W3EG72255S263D3 datasheet, PDF

Datasheet> All Categories > storage> storage> W3EG72255S263D3

W3EG72255S263D3: DescriptionDDR DRAM Module, 256MX72, 0.75ns, CMOS, DIMM-184; Categorystorage storage; File Size237KB，14 Pages; ManufacturerMicrosemi; Websitehttps://www.microsemi.com

Download Datasheet Parametric View All

W3EG72255S263D3 Overview

DDR DRAM Module, 256MX72, 0.75ns, CMOS, DIMM-184

W3EG72255S263D3 Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	Microsemi
Parts packaging code	DIMM
package instruction	DIMM,
Contacts	184
Reach Compliance Code	unknown
ECCN code	EAR99
access mode	DUAL BANK PAGE BURST
Maximum access time	0.75 ns
Other features	AUTO/SELF REFRESH
JESD-30 code	R-XDMA-N184
JESD-609 code	e4
memory density	19327352832 bit
Memory IC Type	DDR DRAM MODULE
memory width	72
Number of functions	1
Number of ports	1
Number of terminals	184
word count	268435456 words
character code	256000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	256MX72
Package body material	UNSPECIFIED
encapsulated code	DIMM
Package shape	RECTANGULAR
Package form	MICROELECTRONIC ASSEMBLY
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Certification status	Not Qualified
self refresh	YES
Maximum supply voltage (Vsup)	2.7 V
Minimum supply voltage (Vsup)	2.3 V
Nominal supply voltage (Vsup)	2.5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Gold (Au)
Terminal form	NO LEAD
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED

Preview

Download Datasheet

View All

White Electronic Designs

W3EG72255S-D3

-JD3

-AJD3

PRELIMINARY*

2GB-256Mx72 DDR SDRAM REGISTERED ECC, w/PLL

FEATURES

Double-data-rate architecture

DDR200, DDR266 and DDR333;

• JEDEC design speciﬁcations

Bi-directional data strobes (DQS)

Differential clock inputs (CK & CK#)

Programmable Read Latency 2,2.5 (clock)

Programmable Burst Length (2,4,8)

Programmable Burst type (sequential & interleave)

Edge aligned data output, center aligned data input.

Auto and self refresh

Serial presence detect

Power supply: V

CC =

2.5V ± 0.2V

JEDEC standard 184 pin DIMM package

• Package height options:

JD3: 30.48mm (1.2"),

AJD3: 28.70mm (1.13")

• Consult factory for availability of lead-free

products.

*This product is under development, is not qualiﬁed or characterized and is subject to

change without notice.

DESCRIPTION

The W3EG72255S is a 256Mx72 Double Data Rate

SDRAM memory module based on 512Mb DDR SDRAM

component. The module consists of eighteen 256Mx4

stacks, in 66 pin TSOP packages mounted on a 184 pin

FR4 substrate. This module is structured as 2 Ranks of

128Mx72 DDR SDRAM.

Synchronous design allows precise cycle control with the

use of system clock. Data I/O transactions are possible

on both edges and Burst Lengths allow the same

device to be useful for a variety of high bandwidth, high

performance memory system applications.

OPERATING FREQUENCIES

DDR333 @CL=2.5

Clock Speed

CL-t

RCD

-t

166MHz

2.5-3-3

DDR266 @CL=2

133MHz

2-2-2

DDR266 @CL=2

133MHz

2-3-3

DDR266 @CL=2.5

133MHz

2.5-3-3

DDR200 @CL=2

100MHz

2-2-2

November 2004

Rev. 2

White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

Recommended Resources

Do you know about the dual-mode power monitoring IC that maximizes system performance?

4-way control keyboard circuit diagram

Staircase wave signal generation circuit composed of ring counter and digital-to-analog converter

Automatically insert clear circuit

60V_40mA voltage stabilizing circuit

PS10, 702F, WT020 physical color picture 1

Please design a pressure sensor conversion circuit: The pressure sensor parameters are as follows:Requirements: Output 0~3.3V. Thank you!...; chenbingjy Analog electronics

Do you know these three special PCB routing techniques?: [color=rgb(62, 62, 62)]Layout is one of the most basic working skills of PCB design engineers. The quality of routing will directly affect the performance of the entire system. Most high-speed design ...; ohahaha PCB Design

FAQ_Using any GPIO to simulate a serial port: Author: Lucien KUANG, ST engineerClick to download pdf document to view:Keywords: BlueNRGProblem: When some customers are debugging in the later stages of a project, there is no serial port to lead ou...; nmg ST - Low Power RF

MM32F103 Development Board Evaluation: Driving OLED Display: It was a good weekend. I didn't work overtime and I slept in the morning, so I'll post it in the evening. I'm very happy. I've got the OLED screen driver. I didn't succeed in porting it with the offic...; yangjiaxu Motor Drive Control（Motor Control）

TMS320C6711 serial communication initialization program: The difficulty of software design for serial communication between TMS320C6711 and TMS320LF2407 is the design of initialization program for McBSP and SCI. The initialization program includes the confi...; fish001 Microcontroller MCU

High Frequency Wireless + Project Submission: 1. Introduction of the work(design name, work photo, function introduction, etc.) This work designs an intelligent high-frequency signal wireless detection and control system For the detection of high...; huihuihaha DigiKey Technology Zone

Shortcut: L0 L1 L2 L3 L4 L5 L6 L7 L8 L9 LA LB LC LD LE LF LG LH LI LJ LK LL LM LN LO LP LQ LR LS LT LU LV LW LX LY LZ M0 M1 M2 M3 M4 M5 M6 M7 M8 M9 MA MB MC MD ME MF MG MH MI MJ MK ML MM MN MO MP MQ MR MS MT MU MV MW MX MY MZ N0 N1 N2 N3 N4 N5 N6 N7 N8 NA NB NC ND NE NF NG NH NI NJ NK NL NM NN NO NP NQ NR NS NT NU NV NX NZ O0 O1 O2 O3 OA OB OC OD OE OF OG OH OI OJ OK OL OM ON OP OQ OR OS OT OV OX OY OZ P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 PA PB PC PD PE PF PG PH PI PJ PK PL PM PN PO PP PQ PR PS PT PU PV PW PX PY PZ Q1 Q2 Q3 Q4 Q5 Q6 Q8 Q9 QA QB QC QE QF QG QH QK QL QM QP QR QS QT QV QW QX QY R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 RA RB RC RD RE RF RG RH RI RJ RK RL RM RN RO RP RQ RR RS RT RU RV RW RX RY RZ

Popular Components