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EPA1825-95

Description
14 Pin DIP High Precision Triple Output TTL Compatible Active Delay Lines
Categorylogic    logic   
File Size14KB,1 Pages
ManufacturerPCA Electronics Inc.
Websitehttp://www.pca.com/
Download Datasheet Parametric View All

EPA1825-95 Overview

14 Pin DIP High Precision Triple Output TTL Compatible Active Delay Lines

EPA1825-95 Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerPCA Electronics Inc.
Parts packaging codeDIP
package instructionDIP, DIP14,.3
Contacts14/8
Reach Compliance Codecompli
Other featuresMAX RISE TIME CAPTURED
seriesTTL
Input frequency maximum value (fmax)10.5263 MHz
JESD-30 codeR-PDIP-T8
JESD-609 codee0
Logic integrated circuit typeACTIVE DELAY LINE
Humidity sensitivity level3
Number of functions3
Number of taps/steps1
Number of terminals8
Maximum operating temperature70 °C
Minimum operating temperature
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Encapsulate equivalent codeDIP14,.3
Package shapeRECTANGULAR
Package formIN-LINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
Maximum supply current (ICC)115 mA
programmable delay lineNO
Prop。Delay @ Nom-Su95 ns
Certification statusNot Qualified
Maximum seat height6.35 mm
Maximum supply voltage (Vsup)5.25 V
Minimum supply voltage (Vsup)4.75 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyTTL
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
Total delay nominal (td)95 ns
width7.62 mm

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Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
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