SO
PBSS5330PA
7 April 2015
N3
30 V, 3 A PNP low VCEsat (BISS) transistor
HU
Product data sheet
1. General description
PNP low V
CEsat
Breakthrough In Small Signal (BISS) transistor, encapsulated in an
ultra thin SOT1061 leadless small Surface-Mounted Device (SMD) plastic package with
medium power capability.
NPN complement: PBSS4330PA.
2. Features and benefits
•
•
•
•
•
Low collector-emitter saturation voltage V
CEsat
High collector current capability I
C
and I
CM
Smaller required Printed-Circuit Board (PCB) area than for conventional transistors
Exposed heat sink for excellent thermal and electrical conductivity
Leadless small SMD plastic package with medium power capability
3. Applications
•
•
•
•
•
Loadswitch
Battery-driven devices
Power management
Charging circuits
Power switches (e.g. motors, fans)
4. Quick reference data
Table 1.
Symbol
V
CEO
I
C
I
CM
R
CEsat
Quick reference data
Parameter
collector-emitter
voltage
collector current
peak collector current
collector-emitter
saturation resistance
single pulse; t
p
≤ 1 ms
I
C
= -3 A; I
B
= -300 mA; pulsed;
t
p
≤ 300 µs; δ ≤ 0.02 ; T
amb
= 25 °C
Conditions
open base
Min
-
-
-
-
Typ
-
-
-
75
Max
-30
-3
-5
107
Unit
V
A
A
mΩ
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NXP Semiconductors
PBSS5330PA
30 V, 3 A PNP low VCEsat (BISS) transistor
5. Pinning information
Table 2.
Pin
1
2
3
Pinning information
Symbol Description
B
E
C
base
emitter
collector
1
2
Simplified outline
3
Graphic symbol
3
1
2
sym013
Transparent top view
DFN2020-3 (SOT1061)
6. Ordering information
Table 3.
Ordering information
Package
Name
PBSS5330PA
DFN2020-3
Description
DFN2020-3: plastic thermal enhanced ultra thin small outline
package; no leads; 3 terminals; body 2 x 2 x 0.65 mm
Version
SOT1061
Type number
7. Marking
Table 4.
Marking codes
Marking code
AJ
Type number
PBSS5330PA
PBSS5330PA
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© NXP Semiconductors N.V. 2015. All rights reserved
Product data sheet
7 April 2015
2 / 16
NXP Semiconductors
PBSS5330PA
30 V, 3 A PNP low VCEsat (BISS) transistor
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
CBO
V
CEO
V
EBO
I
C
I
CM
I
B
P
tot
Parameter
collector-base voltage
collector-emitter voltage
emitter-base voltage
collector current
peak collector current
base current
total power dissipation
T
amb
≤ 25 °C
[1]
[2]
[3]
[4]
Conditions
open emitter
open base
open collector
Min
-
-
-
-
Max
-30
-30
-6
-3
-5
-500
500
1
1.25
2.1
150
150
150
Unit
V
V
V
A
A
mA
mW
W
W
W
°C
°C
°C
single pulse; t
p
≤ 1 ms
-
-
-
-
-
-
-
-55
-65
T
j
T
amb
T
stg
junction temperature
ambient temperature
storage temperature
[1]
[2]
[3]
[4]
Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm .
Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 6 cm .
Device mounted on a ceramic PCB, Al
2
O
3
, standard footprint.
2.5
P
tot
(W)
2.0
(1)
006aab999
2
2
1.5
(2)
(3)
1.0
0.5
(4)
0.0
- 75
- 25
25
75
125
175
T
amb
(°C)
(1) Ceramic PCB, Al
2
O
3
, standard footprint
(2) FR4 PCB, mounting pad for collector 6 cm
(3) FR4 PCB, mounting pad for collector 1 cm
(4) FR4 PCB, standard footprint
Fig. 1.
PBSS5330PA
2
2
Power derating curves
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved
Product data sheet
7 April 2015
3 / 16
NXP Semiconductors
PBSS5330PA
30 V, 3 A PNP low VCEsat (BISS) transistor
9. Thermal characteristics
Table 6.
Symbol
R
th(j-a)
Thermal characteristics
Parameter
thermal resistance
from junction to
ambient
Conditions
in free air
[1]
[2]
[3]
[4]
[1]
[2]
[3]
[4]
10
3
Z
th(j-a)
(K/W)
10
2
duty cycle = 1
0.75
0.33
0.1
10
0.02
0.05
0.01
0.5
0.2
Min
-
-
-
-
Typ
-
-
-
-
Max
250
125
100
60
2
2
Unit
K/W
K/W
K/W
K/W
Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm .
Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 6 cm .
Device mounted on a ceramic PCB, Al
2
O
3
, standard footprint.
006aab979
1
0
10
- 1
10
- 5
10
- 4
10
- 3
10
- 2
10
- 1
1
10
10
2
t
p
(s)
10
3
FR4 PCB, standard footprint
Fig. 2.
Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
PBSS5330PA
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved
Product data sheet
7 April 2015
4 / 16
NXP Semiconductors
PBSS5330PA
30 V, 3 A PNP low VCEsat (BISS) transistor
10
3
Z
th(j-a)
(K/W)
10
2
006aab980
duty cycle = 1
0.75
0.33
0.5
0.2
0.05
0.02
0.01
10
0.1
1
0
10
- 1
10
- 5
10
- 4
10
- 3
10
- 2
2
10
- 1
1
10
10
2
t
p
(s)
10
3
FR4 PCB, mounting pad for collector 1 cm
Fig. 3.
Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
10
3
006aac000
Z
th(j-a)
(K/W)
10
2
duty cycle = 1
0.75
0.33
10
0.1
0.5
0.2
0.05
1
0
0.02
0.01
10
- 1
10
- 5
10
- 4
10
- 3
10
- 2
2
10
- 1
1
10
10
2
t
p
(s)
10
3
FR4 PCB, mounting pad for collector 6 cm
Fig. 4.
Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
PBSS5330PA
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved
Product data sheet
7 April 2015
5 / 16
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