12101C182J4U4A datasheet, PDF - EEWORLD Datasheet

12101C182J4U4A: DescriptionCeramic Capacitor, Multilayer, Ceramic, 100V, 5% +Tol, 5% -Tol, X7R, 15% TC, 0.0018uF, Surface Mount, 1210, CHIP; CategoryPassive components capacitor; File Size82KB，5 Pages; ManufacturerAVX; Environmental Compliance

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12101C182J4U4A Overview

Ceramic Capacitor, Multilayer, Ceramic, 100V, 5% +Tol, 5% -Tol, X7R, 15% TC, 0.0018uF, Surface Mount, 1210, CHIP

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Objectid	1665383360
package instruction	, 1210
Reach Compliance Code	compliant
ECCN code	EAR99
YTEOL	7.3
capacitance	0.0018 µF
Capacitor type	CERAMIC CAPACITOR
dielectric materials	CERAMIC
high	1.02 mm
JESD-609 code	e3
length	3.2 mm
Installation features	SURFACE MOUNT
multi-layer	Yes
negative tolerance	5%
Number of terminals	2
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package shape	RECTANGULAR PACKAGE
Package form	SMT
method of packing	TR, EMBOSSED, 13 INCH
positive tolerance	5%
Rated (DC) voltage (URdc)	100 V
Guideline	AEC-Q200
size code	1210
surface mount	YES
Temperature characteristic code	X7R
Temperature Coefficient	15% ppm/°C
Terminal surface	MATTE TIN OVER NICKEL
Terminal shape	WRAPAROUND
width	2.5 mm

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