MC145146LDS datasheet, PDF - EEWORLD Datasheet

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MC145146LDS: DescriptionPLL/Frequency Synthesis Circuit, CMOS, CDIP20; CategoryAnalog mixed-signal IC The signal circuit; File Size68KB，1 Pages; ManufacturerMotorola ( NXP ); Websitehttps://www.nxp.com

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MC145146LDS Overview

PLL/Frequency Synthesis Circuit, CMOS, CDIP20

MC145146LDS Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Motorola ( NXP )
Reach Compliance Code	unknown
JESD-30 code	R-XDIP-T20
JESD-609 code	e0
Number of terminals	20
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	CERAMIC
encapsulated code	DIP
Encapsulate equivalent code	DIP20,.3
Package shape	RECTANGULAR
Package form	IN-LINE
surface mount	NO
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL

MC145146LDS Related Products

	MC145146LDS	MC145146FN1	MC145146L	MC145146L1D	MC145146L1S	MC145146L1DS	MC145146LS
Description	PLL/Frequency Synthesis Circuit, CMOS, CDIP20	PLL/Frequency Synthesis Circuit, CMOS, PQCC20	PLL/Frequency Synthesis Circuit, CMOS, CDIP20	PLL/Frequency Synthesis Circuit, CMOS, CDIP20	PLL/Frequency Synthesis Circuit, CMOS, CDIP20	PLL/Frequency Synthesis Circuit, CMOS, CDIP20	PLL/Frequency Synthesis Circuit, CMOS, CDIP20
Is it Rohs certified?	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible
Maker	Motorola ( NXP )	Motorola ( NXP )	Motorola ( NXP )	Motorola ( NXP )	Motorola ( NXP )	Motorola ( NXP )	Motorola ( NXP )
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown	unknown	unknown
JESD-30 code	R-XDIP-T20	S-PQCC-J20	R-XDIP-T20	R-XDIP-T20	R-XDIP-T20	R-XDIP-T20	R-XDIP-T20
JESD-609 code	e0	e0	e0	e0	e0	e0	e0
Number of terminals	20	20	20	20	20	20	20
Maximum operating temperature	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
Package body material	CERAMIC	PLASTIC/EPOXY	CERAMIC	CERAMIC	CERAMIC	CERAMIC	CERAMIC
encapsulated code	DIP	QCCJ	DIP	DIP	DIP	DIP	DIP
Encapsulate equivalent code	DIP20,.3	LDCC20,.4SQ	DIP20,.3	DIP20,.3	DIP20,.3	DIP20,.3	DIP20,.3
Package shape	RECTANGULAR	SQUARE	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	IN-LINE	CHIP CARRIER	IN-LINE	IN-LINE	IN-LINE	IN-LINE	IN-LINE
surface mount	NO	YES	NO	NO	NO	NO	NO
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE	J BEND	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE
Terminal pitch	2.54 mm	1.27 mm	2.54 mm	2.54 mm	2.54 mm	2.54 mm	2.54 mm
Terminal location	DUAL	QUAD	DUAL	DUAL	DUAL	DUAL	DUAL
Certification status	-	Not Qualified	Not Qualified	-	Not Qualified	-	Not Qualified

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