EBJ21UE8BDS1 datasheet, PDF - EEWORLD Datasheet

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EBJ21UE8BDS1: Description2GB DDR3 SDRAM SO-DIMM; File Size178KB，18 Pages; ManufacturerELPIDA; Websitehttp://www.elpida.com/en

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EBJ21UE8BDS1 Overview

2GB DDR3 SDRAM SO-DIMM

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DATA SHEET

2GB DDR3 SDRAM SO-DIMM

EBJ21UE8BDS1 (256M words

64 bits, 2 Ranks)

Specifications

•

Density: 2GB

•

Organization



256M words

64 bits, 2 ranks

•

Mounting 16 pieces of 1G bits DDR3 SDRAM sealed

in FBGA

•

Package: 204-pin socket type small outline dual in

line memory module (SO-DIMM)



PCB height: 30.0mm



Lead pitch: 0.6mm



Lead-free (RoHS compliant) and Halogen-free

•

Power supply: VDD

1.5V

0.075V

•

Data rate: 1333Mbps/1066Mbps (max.)

•

Eight internal banks for concurrent operation

(components)

•

Interface: SSTL_15

•

Burst lengths (BL): 8 and 4 with Burst Chop (BC)

•

/CAS Latency (CL): 5, 6, 7, 8, 9

•

/CAS write latency (CWL): 5, 6, 7

•

Precharge: auto precharge option for each burst

access

•

Refresh: auto-refresh, self-refresh

•

Refresh cycles



Average refresh period

7.8µs at 0°C

≤

≤ +85°C

3.9µs at

+85°C <

≤ +95°C

•

Operating case temperature range



TC = 0°C to +95°C

Features

•

Double-data-rate architecture; two data transfers per

clock cycle

•

The high-speed data transfer is realized by the 8 bits

prefetch pipelined architecture

•

Bi-directional differential data strobe (DQS and /DQS)

is transmitted/received with data for capturing data at

the receiver

•

DQS is edge-aligned with data for READs; center-

aligned with data for WRITEs

•

Differential clock inputs (CK and /CK)

•

DLL aligns DQ and DQS transitions with CK

transitions

•

Commands entered on each positive CK edge; data

and data mask referenced to both edges of DQS

•

Data mask (DM) for write data

•

Posted /CAS by programmable additive latency for

better command and data bus efficiency

•

On-Die-Termination (ODT) for better signal quality



Synchronous ODT



Dynamic ODT



Asynchronous ODT

•

Multi Purpose Register (MPR) for temperature read

out

•

ZQ calibration for DQ drive and ODT

•

Programmable Partial Array Self-Refresh (PASR)

•

/RESET pin for Power-up sequence and reset

function

•

SRT range:



Normal/extended

•

Programmable Output driver impedance control

Document No. E1623E20 (Ver. 2.0)

Date Published April 2010 (K) Japan

Printed in Japan

URL: http://www.elpida.com

Elpida

Memory, Inc. 2010

EBJ21UE8BDS1 Related Products

	EBJ21UE8BDS1	EBJ21UE8BDS1-AE-F	EBJ21UE8BDS1-DJ-F
Description	2GB DDR3 SDRAM SO-DIMM	2GB DDR3 SDRAM SO-DIMM	2GB DDR3 SDRAM SO-DIMM
Is it Rohs certified?	-	conform to	conform to
Maker	-	ELPIDA	ELPIDA
Parts packaging code	-	DMA	DMA
package instruction	-	DIMM, DIMM204,24	DIMM, DIMM204,24
Contacts	-	204	204
Reach Compliance Code	-	unknow	unknow
ECCN code	-	EAR99	EAR99
access mode	-	DUAL BANK PAGE BURST	DUAL BANK PAGE BURST
Maximum access time	-	0.3 ns	0.255 ns
Other features	-	AUTO/SELF REFRESH	AUTO/SELF REFRESH
Maximum clock frequency (fCLK)	-	533 MHz	667 MHz
I/O type	-	COMMON	COMMON
JESD-30 code	-	R-XDMA-N204	R-XDMA-N204
JESD-609 code	-	e4	e4
length	-	67.6 mm	67.6 mm
memory density	-	34359738368 bi	34359738368 bi
Memory IC Type	-	DDR DRAM MODULE	DDR DRAM MODULE
memory width	-	64	64
Number of functions	-	1	1
Number of ports	-	1	1
Number of terminals	-	204	204
word count	-	536870912 words	536870912 words
character code	-	512000000	512000000
Operating mode	-	SYNCHRONOUS	SYNCHRONOUS
Maximum operating temperature	-	85 °C	85 °C
organize	-	512MX64	512MX64
Output characteristics	-	3-STATE	3-STATE
Package body material	-	UNSPECIFIED	UNSPECIFIED
encapsulated code	-	DIMM	DIMM
Encapsulate equivalent code	-	DIMM204,24	DIMM204,24
Package shape	-	RECTANGULAR	RECTANGULAR
Package form	-	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY
Peak Reflow Temperature (Celsius)	-	NOT SPECIFIED	NOT SPECIFIED
power supply	-	1.5 V	1.5 V
Certification status	-	Not Qualified	Not Qualified
refresh cycle	-	8192	8192
Maximum seat height	-	3.8 mm	3.8 mm
self refresh	-	YES	YES
Maximum standby current	-	0.208 A	0.224 A
Maximum slew rate	-	2.64 mA	3 mA
Maximum supply voltage (Vsup)	-	1.575 V	1.575 V
Minimum supply voltage (Vsup)	-	1.425 V	1.425 V
Nominal supply voltage (Vsup)	-	1.5 V	1.5 V
surface mount	-	NO	NO
technology	-	CMOS	CMOS
Temperature level	-	OTHER	OTHER
Terminal form	-	NO LEAD	NO LEAD
Terminal pitch	-	0.6 mm	0.6 mm
Terminal location	-	DUAL	DUAL
Maximum time at peak reflow temperature	-	NOT SPECIFIED	NOT SPECIFIED
width	-	30 mm	30 mm

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