M5-192/68-10YI datasheet, PDF - EEWORLD Datasheet

M5-192/68-10YI: DescriptionEE PLD, 16ns, 192-Cell, CMOS, PQFP100, PLASTIC, QFP-100; CategoryProgrammable logic devices Programmable logic; File Size2MB，64 Pages; ManufacturerAMD; Websitehttp://www.amd.com

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M5-192/68-10YI Overview

EE PLD, 16ns, 192-Cell, CMOS, PQFP100, PLASTIC, QFP-100

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	AMD
Parts packaging code	QFP
package instruction	QFP, QFP100,.7X.9
Contacts	100
Reach Compliance Code	unknown
Other features	PAL BLOCKS INTERCONNECTED BY PIA; SHARED INPUT/CLOCK; 4 EXTERNAL CLOCKS; IN-SYSTEM PROGRAMMABLE
maximum clock frequency	83 MHz
In-system programmable	YES
JESD-30 code	R-PQFP-G100
JESD-609 code	e0
JTAG BST	YES
length	20 mm
Dedicated input times
Number of I/O lines	68
Number of macro cells	192
Number of terminals	100
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	0 DEDICATED INPUTS, 68 I/O
Output function	MACROCELL
Package body material	PLASTIC/EPOXY
encapsulated code	QFP
Encapsulate equivalent code	QFP100,.7X.9
Package shape	RECTANGULAR
Package form	FLATPACK
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Programmable logic type	EE PLD
propagation delay	16 ns
Certification status	Not Qualified
Maximum seat height	3.4 mm
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	14 mm

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