Pulse Generator Delay Line, 1-Func, 1-Tap, Complementary Output, CMOS, 0.240 INCH HEIGHT, DIP-14/6
Parameter Name | Attribute value |
Maker | Engineered Components Co. |
Parts packaging code | DIP |
package instruction | QIP, |
Contacts | 14/6 |
Reach Compliance Code | unknown |
Other features | VOLTAGE CONTROLLED AND CONTROL RANGE 3VDC TO 5VDC; MAX RISE TIME CAPTURED |
series | ACT |
Input frequency maximum value (fmax) | 28.1 MHz |
JESD-30 code | R-XDIP-P6 |
length | 20.32 mm |
Logic integrated circuit type | PULSE GENERATOR DELAY LINE |
Number of functions | 1 |
Number of taps/steps | 1 |
Number of terminals | 6 |
Maximum operating temperature | 85 °C |
Minimum operating temperature | -40 °C |
Output polarity | COMPLEMENTARY |
Package body material | UNSPECIFIED |
encapsulated code | QIP |
Package shape | RECTANGULAR |
Package form | IN-LINE |
programmable delay line | NO |
Certification status | Not Qualified |
Maximum seat height | 6.096 mm |
Maximum supply voltage (Vsup) | 5.25 V |
Minimum supply voltage (Vsup) | 4.75 V |
Nominal supply voltage (Vsup) | 5 V |
surface mount | NO |
technology | CMOS |
Temperature level | INDUSTRIAL |
Terminal form | PIN/PEG |
Terminal pitch | 2.54 mm |
Terminal location | DUAL |
width | 7.62 mm |