K6X4016T3F Family
Document Title
256Kx16 bit Low Power and Low Voltage CMOS Static RAM
Preliminary
CMOS SRAM
Revision History
Revision No
0.0
History
Initial draft
Draft Date
July 29, 2002
Remark
Preliminary
The attached datasheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications and
products. SAMSUNG Electronics will answer to your questions about device. If you have any questions, please contact the SAMSUNG branch offices.
1
Revision 0.0
July 2002
K6X4016T3F Family
256Kx16 bit Low Power and Low Voltage CMOS Static RAM
FEATURES
•
Process Technology: Full CMOS
•
Organization: 256K x16
•
Power Supply Voltage: 2.7~3.6V
•
Low Data Retention Voltage: 2V(Min)
•
Three State Outputs
•
Package Type: 44-TSOP2-400F/R
Preliminary
CMOS SRAM
GENERAL DESCRIPTION
The K6X4016T3F families are fabricated by SAMSUNG′s
advanced CMOS process technology. The families support var-
ious operating temperature ranges and have 44-TSOP2 pack-
age types for user flexibility of system design. The families also
support low data retention voltage for battery back-up operation
with low data retention current.
PRODUCT FAMILY
Power Dissipation
Product Family
K6X4016T3F-F
K6X4016T3F-Q
Operating Temperature Vcc Range
Industrial(-40~85°C)
Automotive(-40~125°C)
Speed(ns)
Standby
(I
SB1
, Max)
20µA
30µA
Operating
(I
CC2
, Max)
40mA
PKG Type
44-TSOP2-400F/R
44-TSOP2-400F
2.7~3.6V
70
1)
/85ns
1. The parameter is measured with 30pF test load.
PIN DESCRIPTION
A4
A3
A2
A1
A0
CS
I/OI
I/O2
I/O3
I/O4
Vcc
Vss
I/O5
I/O6
I/O7
I/O8
WE
A17
A16
A15
A14
A13
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A5
A6
A7
OE
UB
LB
I/O16
I/O15
I/O14
I/O13
Vss
Vcc
I/O12
I/O11
I/O10
I/O9
NC
A8
A9
A10
A11
A12
A5
A6
A7
OE
UB
LB
I/O16
I/O15
I/O14
I/O13
Vss
Vcc
I/O12
I/O11
I/O10
I/O9
NC
A8
A9
A10
A11
A12
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
A4
A3
A2
A1
A0
CS
I/OI
I/O2
I/O3
I/O4
Vcc
Vss
I/O5
I/O6
I/O7
I/O8
WE
A17
A16
A15
A14
A13
FUNCTIONAL BLOCK DIAGRAM
Clk gen.
Precharge circuit.
Vcc
Vss
44-TSOP2
Forward
44-TSOP2
Reverse
Row
Addresses
Row
select
Memory array
I/O
1
~I/O
8
Data
cont
Data
cont
Data
cont
I/O Circuit
Column select
I/O
9
~I/O
16
Name
CS
OE
WE
A
0
~A
17
Function
Chip Select Input
Output Enable Input
Write Enable Input
Address Inputs
Name Function
Vcc
Vss
LB
UB
NC
Power
Ground
Lower Byte (I/O
1~8
)
WE
Column Addresses
Upper Byte (I/O
9~16
)
No Connection
OE
UB
LB
CS
I/O
1
~I/O
16
Data Input/Output
Control
logic
SAMSUNG ELECTRONICS CO., LTD.
reserves the right to change products and specifications without notice.
2
Revision 0.0
July 2002
K6X4016T3F Family
PRODUCT LIST
Industrial Temperature Products(-40~85°C)
Part Name
K6X4016T3F-TF70
K6X4016T3F-TF85
K6X4016T3F-RF70
K6X4016T3F-RF85
Function
44-TSOP2-F, 70ns, LL
44-TSOP2-F, 85ns, LL
44-TSOP2-R, 70ns, LL
44-TSOP2-R, 85ns, LL
Preliminary
CMOS SRAM
Automotive Temperature Products(-40~125°C)
Part Name
K6X4016T3F-TQ70
K6X4016T3F-TQ85
Function
44-TSOP2-F, 70ns, L
44-TSOP2-F, 85ns, L
FUNCTIONAL DESCRIPTION
CS
H
L
L
L
L
L
L
L
L
OE
X
1)
H
X
1)
L
L
L
X
1)
X
1)
X
1)
WE
X
1)
H
X
1)
H
H
H
L
L
L
LB
X
1)
X
1)
H
L
H
L
L
H
L
UB
X
1)
X
1)
H
H
L
L
H
L
L
I/O
1~8
High-Z
High-Z
High-Z
Dout
High-Z
Dout
Din
High-Z
Din
I/O
9~16
High-Z
High-Z
High-Z
High-Z
Dout
Dout
High-Z
Din
Din
Mode
Deselected
Output Disabled
Output Disabled
Lower Byte Read
Upper Byte Read
Word Read
Lower Byte Write
Upper Byte Write
Word Write
Power
Standby
Active
Active
Active
Active
Active
Active
Active
Active
1. X means don′t care. (Must be in low or high state)
ABSOLUTE MAXIMUM RATINGS
1)
Item
Voltage on any pin relative to Vss
Voltage on Vcc supply relative to Vss
Power Dissipation
Storage temperature
Operating Temperature
Symbol
V
IN
,V
OUT
V
CC
P
D
T
STG
T
A
Ratings
-0.2 to V
CC
+0.3(max. 3.9V)
-0.2 to 3.9
1.0
-65 to 150
-40 to 85
-40 to 125
Unit
V
V
W
°C
°C
°C
Remark
-
-
-
-
K6X4016T3F-F
K6X4016T3F-Q
1. Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. Functional operation should be
restricted to recommended operating condition. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
3
Revision 0.0
July 2002
K6X4016T3F Family
RECOMMENDED DC OPERATING CONDITIONS
1)
Item
Supply voltage
Ground
Input high voltage
Input low voltage
Note:
1. T
A
=-40 to 85°C, otherwise specified
2. Overshoot: V
CC
+2.0V in case of pulse width
≤
30ns
3. Undershoot: -2.0V in case of pulse width
≤
30ns
4. Overshoot and undershoot are sampled, not 100% tested.
Preliminary
CMOS SRAM
Symbol
Vcc
Vss
V
IH
V
IL
Min
2.7
0
2.2
-0.2
3)
Typ
3.0/3.3
0
-
-
Max
3.6
0
Vcc+0.2
2)
0.6
Unit
V
V
V
V
CAPACITANCE
1)
(f=1MHz, T
A
=25°C)
Item
Input capacitance
Input/Output capacitance
1. Capacitance is sampled, not 100% tested
Symbol
C
IN
C
IO
Test Condition
V
IN
=0V
V
IO
=0V
Min
-
-
Max
8
10
Unit
pF
pF
DC AND OPERATING CHARACTERISTICS
Item
Input leakage current
Output leakage current
Operating power supply current
Symbol
I
LI
I
LO
I
CC
I
CC1
Average operating current
I
CC2
Output low voltage
Output high voltage
Standby Current(TTL)
Standby Current(CMOS)
V
OL
V
OH
I
SB
I
SB1
V
IL
=Vss to Vcc
CS=V
IH
or OE=V
IH
or WE=V
IL
V
IO
=Vss to Vcc
I
IO
=0mA, CS=V
IL
, V
IN
=V
IL
or V
IH
, Read
Cycle time=1µs, 100% duty, I
IO
=0mA CS≤0.2V,
V
IN
≤0.2V
or V
IN
≥Vcc-0.2V
Cycle time=Min
2)
, 100% duty, I
IO
=0mA, CS=V
IL,
V
IN
=V
IH
or V
IL
I
OL
=2.1mA
I
OH
=-1.0mA
CS=V
IH
, Other inputs=V
IL
or V
IH
CS≥Vcc-0.2V, Other
inputs=0~Vcc
K6X4016T3F-F
K6X4016T3F-Q
Test Conditions
Min
-1
-1
-
-
-
-
2.4
-
Typ
-
-
-
-
-
-
-
-
-
-
Max
1
1
4
4
40
0.4
-
0.3
20
30
Unit
µA
µA
mA
mA
mA
V
V
mA
µA
µA
-
-
4
Revision 0.0
July 2002
K6X4016T3F Family
AC OPERATING CONDITIONS
TEST CONDITIONS
( Test Load and Input/Output Reference)
Input pulse level: 0.4 to 2.2V
Input rising and falling time: 5ns
Input and output reference voltage: 1.5V
Output load(see right): C
L
=100pF+1TTL
C
L
1)
=30pF+1TTL
1. 70ns product
Preliminary
CMOS SRAM
C
L
1
)
1.Including scope and jig capacitance
Industrial product: T
A
=-40 to 85°C, Automotive product: T
A
=-40 to 125°C, )
Speed Bins
Parameter List
Symbol
Min
70ns
Max
-
70
70
35
35
-
-
-
-
25
25
25
-
-
-
-
-
-
25
-
-
-
-
Min
85
-
-
-
-
10
5
5
10
0
0
0
85
70
0
70
60
0
0
35
0
5
70
85ns
Max
-
85
85
40
40
-
-
-
-
25
25
25
-
-
-
-
-
-
25
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Units
AC CHARACTERISTICS
( V
CC
=2.7~3.6V,
Read cycle time
Address access time
Chip select to output
Output enable to valid output
LB, UB valid to data output
Read
Chip select to low-Z output
Output enable to low-Z output
LB, UB enable to low-Z output
Output hold from address change
Chip disable to high-Z output
OE disable to high-Z output
LB, UB disable to high-Z output
Write cycle time
Chip select to end of write
Address set-up time
Address valid to end of write
Write pulse width
Write
Write recovery time
Write to output high-Z
Data to write time overlap
Data hold from write time
End write to output low-Z
LB, UB valid to end of write
t
RC
t
AA
t
CO
t
OE
t
BA
t
LZ
t
OLZ
t
BLZ
t
OH
t
HZ
t
OHZ
t
BHZ
t
WC
t
CW
t
AS
t
AW
t
WP
t
WR
t
WHZ
t
DW
t
DH
t
OW
t
BW
70
-
-
-
-
10
5
5
10
0
0
0
70
60
0
60
55
0
0
30
0
5
60
DATA RETENTION CHARACTERISTICS
Item
Vcc for data retention
Data retention current
Data retention set-up time
Recovery time
Symbol
V
DR
I
DR
t
SDR
t
RDR
CS≥Vcc-0.2V
Vcc=3.0V, CS≥Vcc-0.2V
CS≥Vcc-0.2V
See data retention waveform
K6X4016T3F-F
K6X4016T3F-Q
0
5
-
-
Test Condition
Min
2.0
-
Typ
-
-
Max
3.6
20
30
-
-
Unit
V
µA
µA
ms
5
Revision 0.0
July 2002
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