C8051F920
Single/Dual Battery, 0.9-3.6 V, 32 kB, smaRTClock, 10-Bit ADC MCU
Supply Voltage: 0.9 to 3.6 V
-
One-cell mode supports 0.9–1.8 V operation
-
Two-cell mode supports 1.8–3.6 V operation
-
Built-in dc-dc converter with 1.8 –3.3 V output (65 mW max) for
use in one-cell mode; can supply external devices
High-Speed 8051 µC Core
-
Pipe-lined instruction architecture; executes 70% of instructions
in 1 or 2 system clocks
-
25 MIPS peak throughput with 25 MHz clock
-
Expanded interrupt handler
Digital Peripherals
-
24 port I/O; All 5 V tolerant with programmable drive strength
-
Hardware enhanced UART, SPI and SMBus™ serial ports
available concurrently
-
Typical sleep mode current < 0.1 µA; retains state and RAM-
contents over full supply range; fast wakeup
-
2 built-in brown-out detectors cover sleep and active modes
10-Bit Analog to Digital Converter
-
Up to 300 ksps
-
Up to 23 external inputs
-
External pin or internal VREF (no external capacitor required)
-
Built-in temperature sensor
-
External conversion start input option
-
Autonomous Burst Mode with 16-bit automatic averaging
accumulator
-
Low power 32-bit smaRTClock (0.5 uA) operates down to 0.9V
-
Four general purpose 16-bit counter/timers
-
16-bit programmable counter array (PCA) with six capture/com-
pare modules and watchdog timer:
Two Comparators
-
Programmable hysteresis and response time
-
Configurable as interrupt or reset source
-
Low current (< 0.5 µA)
-
Up to 23 Capacitive Touch Sense inputs
Memory
-
4352 bytes internal data RAM (256 + 4K)
-
32 kB bytes Flash; In-system programmable in 1024-byte
sectors; Full read/write/erase functionality over the entire
supply range
•
8, 9, 10, 11, or 16-bit PWM
•
Rising/falling edge capture
•
Frequency output
•
Software timer
Clock Sources
-
Precision internal oscillators: 24.5 MHz with ±2% accuracy sup-
ports UART operation; spread-spectrum mode for reduced EMI
-
-
-
-
Low power internal oscillator: 20 MHz
External oscillator: Crystal, RC, C, CMOS clock
smaRTClock oscillator: 32.768 kHz crystal or self-oscillate
Can switch between clock sources on-the-fly; useful in power
saving modes
-
External memory interface (multiplexed address/data)
On-Chip Debug
-
On-chip debug circuitry facilitates full speed, non-intrusive in-
system debug (no emulator required)
CIP-51 8051
Controller Core
32k Byte ISP Flash
Program Memory
256 Byte SRAM
4096 Byte XRAM
Ultra-Small Package Options
-
32-pin QFN (5x5 mm)
-
32-pin LQFP (9x9 mm)
Temperature Range: –40 to +85 °C
Power On
Reset/PMU
Wake
Reset
Port I/O Configuration
Digital Peripherals
UART
Timers 0,
1, 2, 3
PCA/
WDT
SMBus
SPI 0,1
Crossbar Control
Port 1
Drivers
Priority
Crossbar
Decoder
Port 0
Drivers
C2CK/RST
Debug /
Programming
Hardware
C2D
P0.0/VREF
P0.1/AGND
P0.2/XTAL1
P0.3/XTAL2
P0.4/TX
P0.5/RX
P0.6/CNVSTR
P0.7/IREF0
P1.0/AD0
P1.1/AD1
P1.2/AD2
P1.3/AD3
P1.4/AD4
P1.5/AD5
P1.6/AD6
P1.7/AD7
P2.0/A8
P2.1/A9
P2.2/A10
P2.3/A11
P2.4/ALE
P2.5/RD
P2.6/WR
P2.7/C2D
VDD/DC+
GND/DC-
Power Net
Analog
Power
VREG
CRC
Engine
Digital
Power
SYSCLK
Precision
24.5 MHz
Oscillator
DC/DC
Converter
Low Power
20 MHz
Oscillator
External
Oscillator
Circuit
smaRTClock
Oscillator
SFR
Bus
Analog Peripherals
6-bit
IREF
Internal
External
VREF
A
M
U
X
VDD
VREF
Temp
Sensor
GND
CP0, CP0A
CP1, CP1A
+
-
VBAT
GND
IREF0
Port 2
Drivers
XTAL1
XTAL2
XTAL3
XTAL4
VREF
10-bit
300ksps
ADC
System Clock
Configuration
+
-
Comparators
Low-Voltage/Low-Power
Copyright © 2008 by Silicon Laboratories
11.11.2008
C8051F920
Single/Dual Battery, 0.9-3.6 V, 32 kB, smaRTClock, 10-Bit ADC MCU
Selected Electrical Specifications
(At 25 C°)
Parameter
Supply Input Voltage
two-cell mode
one-cell mode
DC-DC Boost Converter Output
Power (V
OUT
= 1.8–3.3 V)
Supply Current with CPU Active
Supply Current (shutdown)
(V
BAT
= 1.8 V)
Clock Frequency Range
Wakeup Time
Conditions
DC-DC converter disabled
DC-DC converter enabled
Includes on and off-chip current
VDD = 1.8–3.6 V
Clock = 24.5 MHz
(±2% internal precision oscillator)
Sleep mode; smaRTClock off
Sleep mode; smaRTClock running
two-cell mode
one-cell mode
Internal Oscillator
Precision oscillator
Low power oscillator
A/D Converter
Min
1.8
0.9
—
—
—
—
DC
—
—
24
18
Typ
—
—
—
4.1
50
0.6
—
2
10
24.5
20
Max
3.6
1.8
65
—
—
—
25
—
—
25
22
10
300
Units
V
V
mW
mA
nA
µA
MHz
µs
µs
MHz
MHz
bits
ksps
Frequency
Resolution
Throughput Rate
—
—
Package Information: 32-Pin QFN
Bottom View
E/2
Package Information: 32-Pin LQFP
MAX
1.00
0.05
1.00
—
0.30
—
3.25
—
3.25
—
0.50
—
—
—
—
MM
A
A1
A2
b
c
D
D1
e
MIN
—
0.05
1.35
0.30
0.09
TYP
—
—
1.40
0.37
—
9.00 BSC
7.00 BSC
0.80 BSC
MAX
1.60
0.15
1.45
0.45
0.20
MIN
E
E1
L
aaa
bbb
ccc
ddd
TYP
9.00 BSC
7.00 BSC
0.60
0.20
0.20
0.10
0.20
3.5°
MAX
L
8
D2 / 2
7
6
17
18
19
7xe
20
D2
21
E2 / 2
E2
22
23
24
32
31
30
29
28
27
26
25
D
5
4
3
D/2
2
Pin #1 ID
1
7xe
E
Side View
A2
A
A
A1
A2
A3
b
D
D2
E
E2
e
L
N
ND
NE
R
MIN
0.80
0.00
0
—
0.18
—
1.25
—
1.25
—
0.30
—
—
—
0.09
MM
TYP
0.9
0.02
0.65
0.25
0.25
5.00
2.70
5.00
2.70
0.50
0.40
32
8
8
—
10
11
12
13
14
15
16
R
e
b
9
A3
A1
e
0.45
0.75
0°
7°
C8051F9xx Product Family
Device Part #
Package Flash Size RAM Size
C8051F930-GQ
C8051F930-GM
C8051F931-GM
C8051F920-GQ
C8051F920-GM
C8051F921-GM
32-pin LQFP
32-pin QFN
24-pin QFN
32-pin LQFP
32-pin QFN
24-pin QFN
64 kB
64 kB
64 kB
32 kB
32 kB
32 kB
4 kB
4 kB
4 kB
4 kB
4 kB
4 kB
Low-Voltage/Low-Power
Copyright © 2008 by Silicon Laboratories
11.11.2008
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