350 MHz Single-Supply (5 V)
Triple 2:1 Multiplexers
AD8188/AD8189
FEATURES
Fully buffered inputs and outputs
Fast channel-to-channel switching: 4 ns
Single-supply operation (5 V)
High speed
350 MHz bandwidth (−3 dB) @ 200 mV p-p
300 MHz bandwidth (−3 dB) @ 2 V p-p
Slew rate: 1000 V/μs
Fast settling time: 7 ns to 0.1%
Low current: 19 mA/20 mA
Excellent video specifications: load resistor (R
L
) = 150 Ω
Differential gain error: 0.05%
Differential phase error: 0.05°
Low glitch
All hostile crosstalk
−84 dB @ 5 MHz
−52 dB @ 100 MHz
High off isolation: −95 dB @ 5 MHz
Low cost
Fast, high impedance disable feature for connecting
multiple outputs
Logic-shifted outputs
FUNCTIONAL BLOCK DIAGRAM
IN0A
D
GND
IN1A
V
REF
IN2A
V
CC
V
EE
IN2B
V
EE
1
2
3
4
5
6
7
8
9
2
1
24
V
CC
OE
SEL A/B
V
CC
OUT0
V
EE
OUT1
V
CC
OUT2
V
EE
V
CC
06239-001
LOGIC
SELECT
23
22
ENABLE
0
21
20
19
18
17
16
15
14
IN1B
10
V
EE 11
IN0B
12
DV
CC
AD8188/AD8189
13
Figure 1.
APPLICATIONS
Switching RGB in LCD and plasma displays
RGB video switchers and routers
GENERAL DESCRIPTION
The AD8188 (G = 1) and AD8189 (G = 2) are high speed,
single-supply, triple 2-to-1 multiplexers. They offer −3 dB small
signal bandwidth of 350 MHz and −3 dB large signal bandwidth
of 300 MHz, along with a slew rate in excess of 1000 V/μs. With
−84 dB of all hostile crosstalk and −95 dB off isolation, the parts
are well suited for many high speed applications. The
differential gain and differential phase error of 0.05% and 0.05°
respectively, along with 0.1 dB flatness to 70 MHz, make the
AD8188 and AD8189 ideal for professional and component
video multiplexing. The parts offer 4 ns switching time, making
them an excellent choice for switching video signals, while
consuming less than 20 mA on a single 5 V supply (100 mW).
Both devices have a high speed disable feature that sets the
outputs into a high impedance state. This allows the building of
larger input arrays while minimizing off-channel output
loading. The devices are offered in a 24-lead TSSOP.
4.0
3.5
3.0
6.0
5.5
5.0
INPUT
4.5
4.0
3.5
3.0
OUTPUT
2.5
2.0
1.5
0
5
10
TIME (ns)
15
20
06239-002
INPUT VOLTAGE (V)
2.5
2.0
1.5
1.0
0.5
0
–0.5
–1.0
1.0
25
Figure 2. AD8189 Video Amplitude Pulse Response,
V
OUT
= 1.4 V p-p, R
L
= 150 Ω
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2006 Analog Devices, Inc. All rights reserved.
OUTPUT VOLTAGE (V)
AD8188/AD8189
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 5
Thermal Resistance ...................................................................... 5
Maximum Power Dissipation ..................................................... 5
ESD Caution.................................................................................. 5
Pin Configuration and Function Descriptions............................. 6
Typical Performance Characteristics ............................................. 7
Theory of Operation ...................................................................... 14
High Impedance Disable ........................................................... 14
Off Isolation ................................................................................ 14
Full Power Bandwidth vs. −3 dB Large Signal Bandwidth ... 14
Single-Supply Considerations................................................... 14
AC-Coupled Inputs.................................................................... 16
Tolerance to Capacitive Load.................................................... 16
Secondary Supplies and Supply Bypassing ............................. 16
Split-Supply Operation .............................................................. 16
Applications..................................................................................... 17
Single-Supply Operation ........................................................... 17
AC-Coupling............................................................................... 17
DC Restore .................................................................................. 19
High Speed Design Considerations ......................................... 20
Evaluation Board ............................................................................ 21
Schematics................................................................................... 23
Outline Dimensions ....................................................................... 24
Ordering Guide .......................................................................... 24
REVISION HISTORY
10/06—Revision 0: Initial Version
Rev. 0 | Page 2 of 24
AD8188/AD8189
SPECIFICATIONS
T
A
= 25°C. For the AD8188, V
S
= 5 V, R
L
= 1 kΩ to 2.5 V. For the AD8189, V
S
= 5 V, V
REF
= 2.5 V, R
L
= 150 Ω to 2.5 V; unless otherwise noted.
Table 1.
Parameter
DYNAMIC PERFORMANCE
−3 dB Bandwidth (Small Signal)
−3 dB Bandwidth (Large Signal)
0.1 dB Flatness
Slew Rate (10% to 90% Rise Time)
Settling Time to 0.1%
NOISE/DISTORTION PERFORMANCE
Differential Gain
Differential Phase
All Hostile Crosstalk
Channel-to-Channel Crosstalk, RTI
Off Isolation
Input Voltage Noise
DC PERFORMANCE
Voltage Gain Error
Voltage Gain Error Matching
V
REF
Gain Error
Input Offset Voltage
Input Offset Voltage Matching
Input Offset Drift
Input Bias Current
V
REF
Bias Current (AD8189 Only)
INPUT CHARACTERISTICS
Input Resistance
Input Capacitance
Input Voltage Range (About Midsupply)
OUTPUT CHARACTERISTICS
Output Voltage Swing
Short-Circuit Current
Output Resistance
Output Capacitance
POWER SUPPLY
Operating Range
Power Supply Rejection Ratio
Quiescent Current
Conditions
V
OUT
= 200 mV p-p
V
OUT
= 2 V p-p
V
OUT
= 200 mV p-p
V
OUT
= 2 V p-p, R
L
= 150 Ω
V
IN
= 1 V Step, R
L
= 150 Ω
3.58 MHz, R
L
= 150 Ω
3.58 MHz, R
L
= 150 Ω
5 MHz
100 MHz
5 MHz
5 MHz
f = 100 kHz to 100 MHz
No load
Channel A to Channel B
1 kΩ load
T
MIN
to T
MAX
Channel A to Channel B
Min
AD8188/AD8189
Typ
Max
350
300
70
1000
6/7.5
0.05
0.05
−84/−78
−52/−48
−90/−85
−84/−95
7/9
0.1
0.04
0.04
0.2/0.5
±8.0
0.2
10/5
1.5
1.0
1.8/1.3
0.9/1.0
±1.2
+0.9/−1.2
3.1/2.8
2.8/2.5
3.2/3.0
3.0/2.7
85
0.2/0.35
1000/600
1.5/2.0
5.5
−72/−61
−76/−72
18.5/19.5
3.5/4.5
15
3.6/4
4/3.8
±0.3/±0.6
±0.2/±0.2
±0.6
±6.5/±7.0
±5.0/±5.5
4/4
Unit
MHz
MHz
MHz
V/μs
ns
%
Degrees
dB
dB
dB
dB
nV/√Hz
%
%
%
mV
mV
mV
μV/°C
μA
μA
MΩ
pF
V
V
V p-p
V p-p
mA
Ω
kΩ
pF
V
dB
dB
mA
mA
mA
ns
ns
@ 100 kHz
IN0A, IN0B, IN1A, IN1B, IN2A, IN2B
V
REF
R
L
= 1 kΩ
R
L
= 150 Ω
Enabled @ 100 kHz
Disabled @ 100 kHz
Disabled
3.5
+PSRR, V
CC
= 4.5 V to 5.5 V, V
EE
= 0 V
−PSRR, V
EE
= −0.5 V to +0.5 V, V
CC
= 5.0 V
All channels on
All channels off
T
MIN
to T
MAX
, all channels on
50% logic to 50% output settling, INxA = +1 V,
INxB = −1 V
50% logic to 50% output settling, input = 1 V
Rev. 0 | Page 3 of 24
21.5/22.5
4.5/5.5
23
SWITCHING CHARACTERISTICS
Channel-to-Channel Switching Time
Enable-to-Channel On Time
AD8188/AD8189
Parameter
Disable-to-Channel Off Time
Channel Switching Transient (Glitch)
Output Enable Transient (Glitch)
DIGITAL INPUTS
Logic 1 Voltage
Logic 0 Voltage
Logic 1 Input Current
Logic 0 Input Current
Conditions
50% logic to 50% output settling, input = 1 V
All channels grounded
All channels grounded
SEL A/B, OE
SEL A/B, OE
SEL A/B, OE = 2.0 V
SEL A/B, OE = 0.5 V
Min
AD8188/AD8189
Typ
Max
17/5
21/45
64/118
Unit
ns
mV
mV
V
V
nA
μA
1.6
0.6
45
2
Rev. 0 | Page 4 of 24
AD8188/AD8189
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
1
Supply Voltage
DV
CC
to D
GND
DV
CC
to V
EE
V
CC
to D
GND
IN0A, IN0B, IN1A, IN1B, IN2A, IN2B, V
REF
SEL A/B, OE
Output Short-Circuit Operation
Operating Temperature Range
Storage Temperature Range
Lead Temperature Range (Soldering, 10 sec)
1
MAXIMUM POWER DISSIPATION
Rating
5.5 V
5.5 V
8.0 V
8.0 V
V
EE
≤ V
IN
≤ V
CC
D
GND
≤ V
IN
≤ V
CC
Indefinite
–40°C to +85°C
–65°C to +150°C
300°C
The maximum safe junction temperature for plastic encapsulated
devices is determined by the glass transition temperature of the
plastic, approximately 150°C. Temporarily exceeding this limit
may cause a shift in parametric performance due to a change in
the stresses exerted on the die by the package. Exceeding a
junction temperature of 175°C for an extended period can
result in device failure.
While the AD8188/AD8189 is internally short circuit protected,
this may not be sufficient to guarantee that the maximum junction
temperature (150°C) is not exceeded under all conditions. To
ensure proper operation, it is necessary to observe the
maximum power derating curves shown in Figure 3.
2.5
Specification is for device in free air (T
A
= 25°C).
MAXIMUM POWER DISSIPATION (W)
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
2.0
1.5
1.0
THERMAL RESISTANCE
θ
JA
is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 3. Thermal Resistance
Package Type
24-Lead TSSOP
1
1
0.5
0
10
20
30
40
50
60
70
80
90
θ
85
2
JA
θ
JC
20
Unit
°C/W
AMBIENT TEMPERATURE (°C)
Figure 3. Maximum Power Dissipation vs. Temperature
Maximum internal power dissipation (PD) should be derated for ambient
temperature (T
A
) such that PD < (150°C T
A
)/θ
JA
.
2
θ
JA
is on a 4-layer board (2s 2p).
ESD CAUTION
Rev. 0 | Page 5 of 24
06239-003
0
–50 –40 –30 –20 –10
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