21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI90LV032A
PI90LV028A
PI90LV018A
3V LVDS High-Speed
Differential Line Receivers
Features
•
Signaling Rates >400Mbps (200 MHz)
•
Single 3.3V Power Supply Design
•
Accepts ±350mV (typical) Differential Swing
•
Maximum Differential Skew of 0.35ns
•
Maximum Propagation Delay of 3.3ns
•
Low Voltage TTL (LVTTL) Outputs
•
Industrial Temperature Operating Range:
-40°C to 85°C
•
Open, Short, and Terminated Fail Safe
•
Meets or Exceeds IEEE 1596.3
SCI Standard
•
Meets or Exceeds ANSI/TIA/EIA-644
LVDS Standard
•
Packaging (Pb-free & Green avaliable):
- SOIC, TSSOP, and MSOP
PI90LV032A
R
IN1+
R
IN1-
+
R1
-
+
R
OUT1
R
IN1-
R
IN1+
R
OUT1
EN
R
OUT2
R
IN2+
R
IN2-
GND
1
2
3
4
5
6
7
8
16
15
14
16-Pin
13
W, L
12
11
10
9
V
CC
R
IN4-
R
IN4+
R
OUT4
EN*
R
OUT3
R
IN3+
R
IN3-
R
IN2+
R
IN2-
R
IN3+
R
IN3-
R
IN4+
R
IN4-
EN
EN*
R2
-
+
R
OUT2
R3
-
+
R
OUT3
R4
-
R
OUT4
PI90LV028A
R
IN1+
+
Description
The PI90LV032A, PI90LV028A, and PI90LV018A are
differential line receivers that use low-voltage differen-
tial signaling (LVDS) to support data rates in excess of
400 Mbps. These products are designed for applica-
tions requiring high-speed, low-power consumption
and low noise generation.
A differential input signal (350mV) is translated by the
device to 3V CMOS output level. Exclusive to the
PI90LV032A quad receiver is a power-down mode that
Three-states the outputs and places the device in a low-
power idle state (40mW typical).
R
IN1-
R
IN1+
R
IN2+
R
IN2-
1
8
V
CC
R
OUT1
R
OUT2
GND
2
8-Pin
7
3
W,U
6
4
5
R
IN1-
R
IN2+
R
IN2-
R1
-
+
R
OUT1
R2
-
R
OUT2
PI90LV018A
R
R
NC
NC
1
2
3
4
8
V
CC
R
NC
GND
Applications
Applications include point-to-point and multidrop
baseband data transmission over controlled imped-
ance media of approximately 100 Ohms. The transmis-
sion media can be printed circuit board traces,
backplanes, or cables.
The PI90LV032A, PI90LV028A, PI90LV018A and com-
panion line drivers (PI90LV031A, PI90LV027A, and
PI90LV017A) provide new alternatives to RS-232, PECL,
and ECL devices for high-speed, point-to-point inter-
face applications.
8-Pin
7
W,U
6
5
R
IN1+
R
IN1-
+
R1
-
R
OUT1
1
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21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI90LV032A/PI90LV028A/PI90LV018A
3V LVDS High-Speed Differential Line Receivers
Function Tables
PI90LV032A
Enable s
EN
H
H
X
X
L
EN*
X
X
L
L
H
Inputs
R
IN+
H
L
H
L
X
R
IN–
L
H
L
H
X
Output
R
OUT
H
L
H
L
Z
Pin Descriptions
Name
R
OUT
R
IN+
R
IN-
GND
V
CC
De s cription
TTL/CMOS receiver output pins
Non- inverting receiver input pins
Inverting receiver input pins
Ground pin
Positive power supply pin, +3.3V ±10%
PI90LV028A
Inputs
R
IN+
H
L
R
IN-
L
H
Output
R
OUT
H
L
Absolute Maximum Ratings
(see Note 1, Page 4)
Supply Voltage (V
CC
) .................................... –0.3V to +4.0V
Input Voltage (R
IN+
, R
IN-
) ............................ –0.3V to +3.9V
Enable Input Voltage (EN, EN*) ......... –0.3V to (V
CC
+0.3V)
Output Voltage (R
OUT
) ....................... –0.3V to (V
CC
+0.3V)
S Package ................................................................... 750mW
Derate S Package ............................. 8.2mW/°C above +25°C
PI90LV018A
Inputs
R
IN+
H
L
R
IN–
L
H
Output
R
OUT
H
L
Storage Temperature Range ........................ -65°C to +150°C
Lead Temperature Range Soldering (4s) ................... +260°C
Maximum Junction Temperature .............................. +150°C
ESD Rating ....................................................................
≥6kV
Note:
Stresses greater than those listed under Absolute Maximum Ratings may
cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any other conditions above
those indicated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
Recommended Operating Conditions
M in.
Supply Voltage (V
CC
)
Receiver Input Voltage
Operating Free Air
Temperature (T
A
)
+3.0
GND
- 40
+25
Typ.
+3.3
M ax.
+3.6
+3.0
+85
°C
Units
V
2
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21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI90LV032A/PI90LV028A/PI90LV018A
3V LVDS High-Speed Differential Line Receivers
Electrical Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified. (Note 2)
Symbol
V
TH
V
TL
VCMR
Parame te r
Differential Input High
Threshold
Differential Input Low
Threshold
Common- Mode Voltage Range
Conditions
Pin
M in.
Typ.
+20
Vcm = +1.2V(12)
- 100
V
ID
= 200mV peak- to- peak(5)
V
IN
= +2.8V
I
IN
Input Current
V
IN
= 0V
V
IN
= +3.6V
V
CC
= +3.6 or 0V
V
CC
= 0V
R
IN+
,
R
IN-
0.1
- 10
- 10
- 20
2.7
2.7
R
OUT
2.7
3.0
3.0
3.0
0.1
- 15
- 10
2.0
EN,
EN*
GND
- 10
- 1.5
±1
- 0.8
10
V
CC
10
7
15
15
10
mA
- 48
±1
0.25
- 120
+10
V
CC
0.8
+10
V
µA
V
mA
µA
V
±1
±1
- 20
2.3
+10
+10
+20
µA
V
M a x.
+100
Units
mV
I
OH
= - 0.4mA, V
ID
= +200mV
V
OH
Output High Voltage
I
OH
= - 0.4mA, Input terminated
I
OH
= - 0.4mA, Input shorted
V
OL
I
OS
I
OZ
V
IH
V
IL
I
I
V
CL
Output Low Voltage
Output Short Circuit Current
Output Three- State Current
Input High Voltage
Input Low Voltage
Input Current
Input Clamp Voltage
No Load Supply Current
Receivers Enabled
No Load Supply Current
Receivers Disabled
V
IN
= 0V or V
CC
,
Other Input = V
CC
or GND
I
CL
= - 18mA
EN, EN* = V
CC
or GND, Inputs
Open
EN, EN* = 2.4V or 0.5V,
Inputs Open
EN = GND, EN* = V
CC
,
Inputs Open
I
OL
= 2mA, V
ID
= - 200mV
Enabled, Vout = 0V(10)
Disabled, V
OUT
= 0V or V
CC
I
CC
I
CCZ
3
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09/15/04
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21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI90LV032A/PI90LV028A/PI90LV018A
3V LVDS High-Speed Differential Line Receivers
Switching Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified. (Notes 3,4,7,8)
Symbol
t
PHLD
t
PLHD
t
SKD1
t
SKD2
t
SKD3
t
SKD4
t
TLH
t
THL
t
PHZ
t
PLZ
t
PZH
t
PZL
t
MAX
Parame te r
Differential Propagation Delay High to Low (V
CM
= 1.2V)
Differential Propagation Delay Low to High (V
CM
= 1.2V)
Differential Pulse Skew | t
PHLD
- t
PLHD
|
(6)
Differential Channel- to- Channel Skew- same device
(7)
Differential Part- to- Part Skew
(8)
Differential Part- to- Part Skew
(9)
Rise Time
Fall Time
Disable Time High to Z
Disable Time Low to Z
Enable Time Z to High
Enable Time Z to Low
Maximum Operating Frequency
(13)
Conditions
M in.
1.8
1.8
0
Typ.
M ax.
4.7
4.7
Units
0.1
0.1
0.35
0.5
1.0
1.5
ns
C
L
= 10pF
V
ID
= 200mV
(Figures 1 & 2)
0
0.35
0.35
R
L
= 2K
Ω
C
L
= 10pF
(Figures 3 & 4)
All channels switching
200
8
6
11
11
250
1.2
1.2
12
12
17
17
MHz
Notes:
1.
“Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply
that the devices should be operated at these limits. The table of “Electrical Characteristics” specifies conditions of device operation.
2.
Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground unless
otherwise specified.
3.
All typicals are given for: V
CC
= +3.3V, T
A
= +25°C.
4.
Generator waveform for all tests unless otherwise specified: f = 1 MHz, Z
O
= 50Ω, t
R
and t
F
(0% to 100%)
≤ 3ns
for R
IN
.
5.
The VCMR range is reduced for larger VID. Example : if VID = 400mV, the VCMR is 0.2V to 2.2V. The fail-safe condition with inputs
shorted is valid over a common-mode range of 0V to 2.3V. A VID up tp V
CC
- 0V may be applied to the R
IN+
/ R
IN-
inputs with the
Common-Mode voltage set to V
CC
/2. Propagation delay and Differential Pulse skew decrease when VID is increased from 200mV to
400mV. Skew specifications apply for 200mV
≤
VID
≤
800mV over the common mode range.
6.
tskd1 is the magnitude difference in differential propagation delay time between the positive going edge and the negative going edge of the
same channel.
7.
t
SKD2
, Channel-to-Channel Skew, is defined as the difference between the propagation delay of one channel and that of the others on the
same chip with any event on the inputs.
8.
t
SKD3
, Part-to-Part Skew, is the differential Channel-to-Channel skew of any event between devices. This specification applies to devices
at the same V
CC
,and within 5ºC of each other within the operating temperature range.
9.
t
SKD4
, Part-to-Part Skew, is the differential Channel-to-Channel skew of any event between devices. This specification applies
to devices over recommended operating temperature and voltage ranges, and across process distribution. tskd4 is defined as
IMax
- Mini
differential propagation delay.
10. Output short circuit current (I
OS
) is specified as magnitude only, minus sign indicates direction only. Only one output should be shorted at
a time, do not exceed maximum junction temperature specification.
11. C
L
includes probe and jig capacitance.
12. V
CC
is always higher than R
IN+
and R
IN-
voltage. R
IN-
and R
IN+
are allowed to have a voltage range -0.2V to V
CC
- VID/2.
However, to be compliant with AC specifications, the common voltage range 0.1V to 2.3V.
13. fmax generator input conditions: t
R
= t
F
< 1ns, (0% to 100%), 50% duty cycle, differential (1.05V to1.35V peak to peak).
Output Criteria: duty cycle = 60%/40%, V
OL
(max 0.4V), V
OH
(min 2.7V), Load = 10pF (stray plus probes).
4
PS8423C
09/15/04
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21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI90LV032A/PI90LV028A/PI90LV018A
3V LVDS High-Speed Differential Line Receivers
Parameter Measurement Information
Generator
Receiver ENABLED
Figure 1. Receiver Propagation Delay and Transition Time Test Circuit
Figure 2. Receiver Propagation Delay and Transition Time Waveforms
C
L
includes load and test jig capacitance.
S
1
= V
CC
for T
PZL
, and T
PLZ
measurements
S
1
= GND for t
PZH
and t
PHZ
measurements
Figure 3. Receiver Three-STATE Delay Test Circuit
5
PS8423C
09/15/04
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