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TC74VCX16834FT(SPL

Description
TC74VCX16834FT(SPL
Categorylogic    logic   
File Size260KB,12 Pages
ManufacturerToshiba Semiconductor
Websitehttp://toshiba-semicon-storage.com/
Download Datasheet Parametric View All

TC74VCX16834FT(SPL Overview

TC74VCX16834FT(SPL

TC74VCX16834FT(SPL Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerToshiba Semiconductor
package instructionTSSOP, TSSOP56,.3,20
Reach Compliance Codeunknown
Control typeENABLE LOW
JESD-30 codeR-PDSO-G56
Load capacitance (CL)30 pF
Logic integrated circuit typeBUS DRIVER
MaximumI(ol)0.024 A
Number of digits18
Number of functions1
Number of terminals56
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output characteristics3-STATE
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSSOP56,.3,20
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
power supply3.3 V
Prop。Delay @ Nom-Sup4.2 ns
Certification statusNot Qualified
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal formGULL WING
Terminal pitch0.5 mm
Terminal locationDUAL
TC74VCX16834FT
TOSHIBA CMOS Digital Integrated Circuit
Silicon Monolithic
TC74VCX16834FT
Low-Voltage 18-Bit Universal Bus Driver with 3.6-V Tolerant Inputs and Outputs
The TC74VCX16834FT is a high-performance CMOS 18-bit
universal bus driver. Designed for use in 1.8-V, 2.5-V or 3.3-V
systems, it achieves high-speed operation while maintaining the
CMOS low power dissipation.
It is also designed with overvoltage tolerant inputs and outputs
up to 3.6 V.
Data flow from A to Y is controlled by the output-enable (OE)
input. The device operates in the transparent mode when the
latch-enable (LE) input is low.
When LE is high, the A data is latched if the clock (CK) input
Weight: 0.25 g (typ.)
is held at a high or low logic level. If LE is high, the A data is
stored in the latch/flip-flop on the low-to-high transition of CK.
When OE is high, the outputs are in the high-impedance state.
All inputs are equipped with protection circuits against static discharge.
Features
Low-voltage operation: V
CC
= 1.8 to 3.6 V
High-speed operation: t
pd
= 3.3 ns (max) (V
CC
= 3.0 to 3.6 V)
: t
pd
= 4.2 ns (max) (V
CC
= 2.3 to 2.7 V)
: t
pd
= 8.4 ns (max) (V
CC
= 1.8 V)
Output current : I
OH
/I
OL
= ±24 mA (min) (V
CC
= 3.0 V)
: I
OH
/I
OL
= ±18 mA (min) (V
CC
= 2.3 V)
: I
OH
/I
OL
= ±6 mA (min) (V
CC
= 1.8 V)
Latch-up performance:
−300
mA
ESD performance: Machine model
≥ ±200
V
Human body model
≥ ±2000
V
Package: TSSOP
3.6-V tolerant function and power down protection provided on all inputs and outputs
Start of commercial production
1998-08
1
2014-03-01

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