EE PLD, 12ns, 384-Cell, CMOS, PBGA324, FBGA-324
Parameter Name | Attribute value |
Is it lead-free? | Lead free |
Is it Rohs certified? | conform to |
Maker | XILINX |
Parts packaging code | BGA |
package instruction | FBGA-324 |
Contacts | 324 |
Reach Compliance Code | compliant |
ECCN code | 3A991.D |
Other features | YES |
maximum clock frequency | 83 MHz |
In-system programmable | YES |
JESD-30 code | S-PBGA-B324 |
JESD-609 code | e1 |
JTAG BST | YES |
length | 23 mm |
Humidity sensitivity level | 3 |
Dedicated input times | |
Number of I/O lines | 220 |
Number of macro cells | 384 |
Number of terminals | 324 |
Maximum operating temperature | 70 °C |
Minimum operating temperature | |
organize | 0 DEDICATED INPUTS, 220 I/O |
Output function | MACROCELL |
Package body material | PLASTIC/EPOXY |
encapsulated code | BGA |
Encapsulate equivalent code | BGA324,20X20,40 |
Package shape | SQUARE |
Package form | GRID ARRAY |
Peak Reflow Temperature (Celsius) | 250 |
power supply | 3.3 V |
Programmable logic type | EE PLD |
propagation delay | 12 ns |
Certification status | Not Qualified |
Maximum seat height | 2.5 mm |
Maximum supply voltage | 3.6 V |
Minimum supply voltage | 3 V |
Nominal supply voltage | 3.3 V |
surface mount | YES |
technology | CMOS |
Temperature level | COMMERCIAL |
Terminal surface | Tin/Silver/Copper (Sn95.5Ag4.0Cu0.5) |
Terminal form | BALL |
Terminal pitch | 1 mm |
Terminal location | BOTTOM |
Maximum time at peak reflow temperature | 30 |
width | 23 mm |