PHD13005
NPN power transistor with integrated diode
Rev. 02 — 29 July 2010
Product data sheet
1. Product profile
1.1 General description
High voltage, high speed, planar passivated NPN power switching transistor with
integrated anti-parallel E-C diode in a SOT78 plastic package.
1.2 Features and benefits
Fast switching
High voltage capability
Integrated anti-parallel E-C diode
Low thermal resistance
1.3 Applications
Integrated fluorescent lamp ballasts
e.g. high power cluster lamps
Low Voltage Tungsten Halogen
transformers
Remote fluorescent lamp ballasts
Self Oscillating Power Supplies
1.4 Quick reference data
Table 1.
Symbol
I
C
P
tot
V
CESM
Quick reference data
Parameter
collector current
total power
dissipation
collector-emitter
peak voltage
DC current gain
Conditions
see
Figure 1;
see
Figure 2;
see
Figure 4;
DC
see
Figure 3;
T
mb
≤
25 °C
V
BE
= 0 V
Min
-
-
-
Typ
-
-
-
Max Unit
4
75
700
A
W
V
Static characteristics
h
FE
V
CE
= 5 V; I
C
= 1.0 A;
see
Figure 10
V
CE
= 5 V; I
C
= 2.0 A;
see
Figure 10
12
10
20
17
40
28
NXP Semiconductors
PHD13005
NPN power transistor with integrated diode
2. Pinning information
Table 2.
Pin
1
2
3
mb
Pinning information
Symbol Description
B
C
E
C
base
collector
emitter
mounting base; connected to
collector
mb
C
Simplified outline
Graphic symbol
B
E
sym131
1 2 3
SOT78 (TO-220AB)
3. Ordering information
Table 3.
Ordering information
Package
Name
PHD13005
TO-220AB
Description
plastic single-ended package; heatsink mounted; 1 mounting
hole; 3-lead TO-220AB
Version
SOT78
Type number
4. Limiting values
Table 4.
Symbol
V
CESM
V
CBO
V
CEO
I
C
I
CM
I
B
I
BM
P
tot
T
stg
T
j
Limiting values
Parameter
collector-emitter peak voltage
collector-base voltage
collector-emitter voltage
collector current
peak collector current
base current
peak base current
total power dissipation
storage temperature
junction temperature
T
mb
≤
25 °C; see
Figure 3
Conditions
V
BE
= 0 V
I
E
= 0 A
I
B
= 0 A
DC; see
Figure 1;
see
Figure 2;
see
Figure 4
see
Figure 4;
see
Figure 1;
see
Figure 2
DC
Min
-
-
-
-
-
-
-
-
-65
-
Max
700
700
400
4
8
2
4
75
150
150
Unit
V
V
V
A
A
A
A
W
°C
°C
In accordance with the Absolute Maximum Rating System (IEC 60134).
PHD13005
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 02 — 29 July 2010
2 of 14
NXP Semiconductors
PHD13005
NPN power transistor with integrated diode
8
I
C
(A)
6
003aad544
V
CC
L
C
V
CL(CE)
probe point
I
Bon
V
BB
V
BE
=
−5V
4
L
B
DUT
001aab999
2
0
0
200
400
600
800
V
CL(CE)
(V)
Fig 1.
Reverse bias safe operating area
120
P
der
(%)
80
Fig 2.
Test circuit for reverse bias safe operating area
03aa13
40
0
0
50
100
150
T
h
(°C)
200
Fig 3.
Normalized total power dissipation as a function of heatsink temperature
PHD13005
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 02 — 29 July 2010
3 of 14
NXP Semiconductors
PHD13005
NPN power transistor with integrated diode
10
2
I
C
(A)
10
I
CM(max)
I
C(max)
(1)
001aai071
duty cycle = 0.01
(4)
t
p
= 20
μs
50
μs
100
μs
200
μs
500
μs
DC
1
(2)
10
−1
10
−2
(3)
(5)
10
−3
1
10
10
2
V
CL(CE)
(V)
10
3
T
h
≤
25 °C
Mounted with heatsink compound and (30 ± 5) N force on the centre of the envelope
(1) P
tot
maximum and P
tot
peak maximum lines
(2) Second breakdown limits
(3) Region of permissible DC operation
(4) Extension of operating region for repetitive pulse operation
(5) Extension of operating region during turn-on in single transistor converters provided that
R
BE
≤
100
Ω
and t
p
≤
0.6
μs
Fig 4.
Forward bias safe operating area
PHD13005
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 02 — 29 July 2010
4 of 14
NXP Semiconductors
PHD13005
NPN power transistor with integrated diode
5. Thermal characteristics
Table 5.
Symbol
R
th(j-mb)
R
th(j-a)
Thermal characteristics
Parameter
Conditions
Min
-
-
Typ
-
60
Max
1.67
-
Unit
K/W
K/W
thermal resistance from junction to mounting see
Figure 5
base
thermal resistance from junction to ambient
in free air
10
Z
th(j-mb)
(K/W)
1
δ
= 0.5
0.2
0.1
10
−1
0.05
0.02
0.01
t
p
1/f
P
003aad543
δ
=
t
p
1/f
t
10
−2
10
−5
10
−4
10
−3
10
−2
10
−1
1
t
p
(s)
10
Fig 5.
Transient thermal impedance from junction to mounting base as a function of pulse duration
PHD13005
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 02 — 29 July 2010
5 of 14
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