P4C167L-20PC datasheet, PDF - EEWORLD Datasheet

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P4C167L-20PC: DescriptionStandard SRAM, 16KX1, 20ns, CMOS, PDIP20, 0.300 INCH, PLASTIC, DIP-20; Categorystorage storage; File Size192KB，10 Pages; ManufacturerPyramid Semiconductor Corporation; Websitehttp://www.pyramidsemiconductor.com/

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P4C167L-20PC Overview

Standard SRAM, 16KX1, 20ns, CMOS, PDIP20, 0.300 INCH, PLASTIC, DIP-20

P4C167L-20PC Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	Pyramid Semiconductor Corporation
Parts packaging code	DIP
package instruction	0.300 INCH, PLASTIC, DIP-20
Contacts	20
Reach Compliance Code	compliant
ECCN code	EAR99
Maximum access time	20 ns
JESD-30 code	R-PDIP-T20
JESD-609 code	e0
length	25.908 mm
memory density	16384 bit
Memory IC Type	STANDARD SRAM
memory width	1
Number of functions	1
Number of terminals	20
word count	16384 words
character code	16000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	16KX1
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Package shape	RECTANGULAR
Package form	IN-LINE
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Certification status	Not Qualified
Maximum seat height	5.334 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	TIN LEAD
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	7.62 mm

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P4C167/P4C167L

ULTRA HIGH SPEED 16K X 1

STATIC CMOS RAMS

FEATURES

Full CMOS, 6T Cell

High Speed (Equal Access and Cycle Times)

– 10/12/15/20/25 ns (Commercial)

– 12/15/20/25/35 ns (Industrial)

– 15/20/25/35/45 ns (Military)

Low Power Operation

Single 5V±10% Power Supply

Data Retention with 2.0V Supply (P4C167L

Military)

Separate Data I/O

Three-State Output

TTL Compatible Output

Fully TTL Compatible Inputs

Standard Pinout (JEDEC Approved)

– 20-Pin 300 mil DIP

– 20-Pin 300 mil SOJ

– 20-Pin LCC

DESCRIPTION

The P4C167/L are 16,384-bit high speed static RAMs or-

ganized as 16K x 1. The CMOS memories require no clocks

or refreshing and have equal access and cycle times. The

RAMs operate from a single 5V ± 10% tolerance power

supply. Data integrity is maintained for supply voltages

down to 2.0V, typically drawing 10µA.

Access times as fast as 10 nanoseconds are available,

greatly enhancing system speeds. CMOS reduces power

consumption to low levels.

The P4C167/L are available in 20-pin 300 mil DIP, 20-pin

300 mil SOJ, and 20-pin LCC packages providing excel-

lent board level densities.

FUNCTIONAL BLOCK DIAGRAM

PIN CONFIGURATIONS

DIP (P2, C6)

SOJ (J2) SIMILAR

LCC (L9)

Document #

SRAM106

REV A

Revised October 2005

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