UPD7225GC-AB6 datasheet, PDF - EEWORLD Datasheet

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UPD7225GC-AB6: Description4 X 32 SEGMENTS DOT MAT LCD DRVR AND DSPL CTLR, PQFP56; Categorysemiconductor The embedded processor and controller; File Size253KB，52 Pages; ManufacturerNEC ( Renesas ); Websitehttps://www2.renesas.cn/zh-cn/

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UPD7225GC-AB6 Overview

4 X 32 SEGMENTS DOT MAT LCD DRVR AND DSPL CTLR, PQFP56

UPD7225GC-AB6 Parametric

Parameter Name	Attribute value
Number of functions	1
Number of terminals	56
Maximum operating temperature	70 Cel
Minimum operating temperature	-10 Cel
Maximum supply/operating voltage	5.5 V
Minimum supply/operating voltage	4.5 V
Rated supply voltage	5 V
External data bus width	1
Processing package description	10 × 10 MM, plastic, quad flat package-56
state	DISCONTINUED
Craftsmanship	CMOS
packaging shape	SQUARE
Package Size	FLATPACK
surface mount	Yes
Terminal form	GULL WING
Terminal spacing	0.6500 mm
terminal coating	tin lead
Terminal location	Four
Packaging Materials	Plastic/Epoxy
Temperature level	COMMERCIAL
Address bus width	0.0
Maximum FCLK clock frequency	0.2000 MHz
show configuration	4 × 32 segments
Microprocessor type	Dot matrix LCD driver and DSPL control

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DATA SHEET

MOS INTEGRATED CIRCUIT

PD7225

PROGRAMMABLE LCD CONTROLLER/DRIVER

The

PD7225 is a software-programmable LCD (Liquid Crystal Display) controller/driver. The

PD7225 can be

serially interfaced with the CPU in a microcomputer and can directly drive 2, 3, or 4-time division LCD. The

PD7225

contains a segment decoder which can generate specific segment patterns. In addition, the

PD7225 can be used to

control on/off (blinking) operation of a display.

FEATURES

• Can directly drive LCD

• Programmable time-division multiplexing

•

Static drive

Divide-by-2, 3, or -4 time division multiplexing

7-segment

Divide-by-4

Divide-by-3

Divide-by-2

time division ............... 16 digits

time division ............... 10 2/3 digits

time division ............... 8 digits

• Number of digits displayed

•

Static................................................. 4 digits

•

14-segment

Divide-by-4

time division ............... 8 digits

• Bias method

Static, 1/2, 1/3

• Segment decoder output

•

7-segment : Numeric characters 0 to 9, six symbols

14-segment : 36 alphanumeric characters, 13 symbols

• Blinking operation

• Multi-chip configuration possible

• 8-bit serials interface

75X series and 78K series compatible

• CMOS

• Single power supply

ORDERING INFORMATION

Part Number

Package

52-pin plastic QFP (14

14 mm)

52-pin plastic QFP (straight) (

56-pin plastic QFP (10

10 mm)

52-pin plastic QFP (14

14 mm)

PD7225G00

PD7225G01

PD7225GB-3B7

PD7225GC-AB6

The information in this document is subject to change without notice. Before using this document, please

confirm that this is the latest version.

Not all devices/types available in every country. Please check with local NEC representative for

availability and additional information.

Document No. S14308EJ6V0DS00 (6th edition)

(O.D. No. IC-1555)

Date Published June 1999 N CP (K)

Printed in Japan

The mark

shows major revised points.

1986, 1999

UPD7225GC-AB6 Related Products

	UPD7225GC-AB6	UPD7225GB-3B7	UPD7225G01	UPD7225G00	UPD7225
Description	4 X 32 SEGMENTS DOT MAT LCD DRVR AND DSPL CTLR, PQFP56	4 X 32 SEGMENTS DOT MAT LCD DRVR AND DSPL CTLR, PQFP56	DOT MAT LCD DRVR AND DSPL CTLR, PQFP52	DOT MAT LCD DRVR AND DSPL CTLR, PQFP52	4 X 32 SEGMENTS DOT MAT LCD DRVR AND DSPL CTLR, PQFP56
Number of functions	1	1	1	1	1
Number of terminals	56	56	52	52	56
Maximum operating temperature	70 Cel	70 Cel	70 Cel	70 Cel	70 Cel
Minimum operating temperature	-10 Cel	-10 Cel	-10 Cel	-10 Cel	-10 Cel
Maximum supply/operating voltage	5.5 V	5.5 V	5.5 V	5.25 V	5.5 V
Minimum supply/operating voltage	4.5 V	4.5 V	4.5 V	4.75 V	4.5 V
Rated supply voltage	5 V	5 V	5 V	5 V	5 V
Processing package description	10 × 10 MM, plastic, quad flat package-56	10 × 10 MM, plastic, quad flat package-56	14 × 14 MM, straight, plastic, square flat package-52	14 × 14 MM, plastic, quad flat package-52	10 × 10 MM, plastic, quad flat package-56
state	DISCONTINUED	DISCONTINUED	DISCONTINUED	DISCONTINUED	DISCONTINUED
Craftsmanship	CMOS	CMOS	CMOS	CMOS	CMOS
packaging shape	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE
Package Size	FLATPACK	FLATPACK	FLATPACK	FLATPACK	FLATPACK
surface mount	Yes	Yes	Yes	Yes	Yes
Terminal form	GULL WING	GULL WING	FLAT	GULL WING	GULL WING
Terminal spacing	0.6500 mm	0.6500 mm	1 mm	1 mm	0.6500 mm
Terminal location	Four	Four	Four	Four	Four
Packaging Materials	Plastic/Epoxy	Plastic/Epoxy	Plastic/Epoxy	Plastic/Epoxy	Plastic/Epoxy
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Maximum FCLK clock frequency	0.2000 MHz	0.2000 MHz	0.2000 MHz	0.2000 MHz	0.2000 MHz
Microprocessor type	Dot matrix LCD driver and DSPL control	Dot matrix LCD driver and DSPL control	Dot matrix LCD driver and DSPL control	Dot matrix LCD driver and DSPL control	Dot matrix LCD driver and DSPL control
External data bus width	1	1	-	0.0	1
terminal coating	tin lead	tin lead	tin lead	-	tin lead
Address bus width	0.0	0.0	-	0.0	0.0
show configuration	4 × 32 segments	4 × 32 segments	-	-	4 × 32 segments

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