DDR DRAM, 128MX4, 0.7ns, CMOS, PBGA60, HALOGEN FREE AND ROHS COMPLIANT, FBGA-60
| Parameter Name | Attribute value |
| Is it lead-free? | Lead free |
| Is it Rohs certified? | conform to |
| Maker | SAMSUNG |
| Parts packaging code | BGA |
| package instruction | TBGA, BGA60,9X12,40/32 |
| Contacts | 60 |
| Reach Compliance Code | compliant |
| ECCN code | EAR99 |
| access mode | FOUR BANK PAGE BURST |
| Maximum access time | 0.7 ns |
| Other features | AUTO/SELF REFRESH |
| Maximum clock frequency (fCLK) | 166 MHz |
| I/O type | COMMON |
| interleaved burst length | 2,4,8 |
| JESD-30 code | R-PBGA-B60 |
| length | 12 mm |
| memory density | 536870912 bit |
| Memory IC Type | DDR DRAM |
| memory width | 4 |
| Number of functions | 1 |
| Number of ports | 1 |
| Number of terminals | 60 |
| word count | 134217728 words |
| character code | 128000000 |
| Operating mode | SYNCHRONOUS |
| Maximum operating temperature | 70 °C |
| Minimum operating temperature | |
| organize | 128MX4 |
| Output characteristics | 3-STATE |
| Package body material | PLASTIC/EPOXY |
| encapsulated code | TBGA |
| Encapsulate equivalent code | BGA60,9X12,40/32 |
| Package shape | RECTANGULAR |
| Package form | GRID ARRAY, THIN PROFILE |
| Peak Reflow Temperature (Celsius) | NOT SPECIFIED |
| power supply | 2.5 V |
| Certification status | Not Qualified |
| refresh cycle | 8192 |
| Maximum seat height | 1.2 mm |
| self refresh | YES |
| Continuous burst length | 2,4,8 |
| Maximum standby current | 0.005 A |
| Maximum slew rate | 0.18 mA |
| Maximum supply voltage (Vsup) | 2.7 V |
| Minimum supply voltage (Vsup) | 2.3 V |
| Nominal supply voltage (Vsup) | 2.5 V |
| surface mount | YES |
| technology | CMOS |
| Temperature level | COMMERCIAL |
| Terminal form | BALL |
| Terminal pitch | 1 mm |
| Terminal location | BOTTOM |
| Maximum time at peak reflow temperature | NOT SPECIFIED |
| width | 9 mm |
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