TRU050TELGA30.72 datasheet, PDF

TRU050TELGA30.72: DescriptionPhase Locked Loop, CDIP16, ROHS COMPLIANT, HERMETIC SEALED, CERAMIC, DIP-16; CategoryAnalog mixed-signal IC The signal circuit; File Size173KB，14 Pages; ManufacturerVectron International, Inc.; Websitehttp://www.vectron.com/; Environmental Compliance

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TRU050TELGA30.72 Overview

Phase Locked Loop, CDIP16, ROHS COMPLIANT, HERMETIC SEALED, CERAMIC, DIP-16

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Vectron International, Inc.
Parts packaging code	DIP
package instruction	DIP,
Contacts	16
Reach Compliance Code	compliant
Analog Integrated Circuits - Other Types	PHASE LOCKED LOOP
JESD-30 code	R-CDIP-T16
JESD-609 code	e4
length	20.32 mm
Humidity sensitivity level	1
Number of functions	1
Number of terminals	16
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DIP
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	260
Certification status	Not Qualified
Maximum seat height	4.69 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
Temperature level	INDUSTRIAL
Terminal surface	GOLD OVER NICKEL
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	40
width	7.62 mm

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