S29AL008D Known Good Die
8 Megabit (1 M x 8-Bit/512 K x 16-Bit)
CMOS 3.0 Volt-only, Boot Sector Flash Memory
Supplement
This product has been retired and is not recommended for designs. Please contact your Spansion representative for alternates.
Availability of this document is retained for reference and historical purposes only.
Distinctive Characteristics
Single power supply operation
– 2.7V to 3.6V for read, program, and erase operations
Embedded Algorithms
– Embedded Erase algorithm automatically preprograms and erases
the entire chip or any combination of designated sectors
– Embedded Program algorithm automatically writes and verifies data
at specified addresses
Manufactured on 0.20µm process technology
High performance
– Access times as fast as 70 ns
Ultra low power consumption (typical values at 5 MHz)
–
–
–
–
200 nA Automatic Sleep mode current
200 nA standby mode current
7 mA read current
15 mA program/erase current
Minimum one million write cycle guarantee per sector
Compatibility with JEDEC standards
– Pinout and software compatible with single-power supply Flash
– Superior inadvertent write protection
Data# Polling and toggle bits
– Provides a software method of detecting program or erase operation
completion
Flexible sector architecture
– One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and fifteen 64 Kbyte
sectors (byte mode)
– One 8 Kword, two 4 Kword, one 16 Kword, and fifteen 32 Kword
sectors (word mode)
– Supports full chip erase
– Sector Protection features:
– A hardware method of locking a sector to prevent any program or
erase operations within that sector
– Sectors can be locked in-system or via programming equipment
– Temporary Sector Unprotect feature allows code changes in
previously locked sectors
Ready/Busy# pin (RY/BY#)
– Provides a hardware method of detecting program or erase cycle
completion
Erase Suspend/Erase Resume
– Suspends an erase operation to read data from, or program data to,
a sector that is not being erased, then resumes the erase operation
Hardware reset pin (RESET#)
– Hardware method to reset the device to reading array data
20-year data retention at 125°C
– Reliable operation for the life of the system
Unlock Bypass Program Command
– Reduces overall programming time when issuing multiple program
command sequences
Tested to data sheet specifications at temperature
Quality and reliability levels equivalent to standard packaged
components
Top or bottom boot block configurations available
Publication Number
S29AL008D_KGD_SP
Revision
A
Amendment
6
Issue Date
February 27, 2009
Supplement
1.
General Description
The S29AL008D in Known Good Die (KGD) form is an 8 Mbit, 3.0 volt-only Flash memory. Spansion defines
KGD as standard product in die form, tested for functionality and speed. Spansion KGD products have the
same reliability and quality as Spansion products in packaged form.
1.1
S29AL008D Features
The S29AL008D is an 8 Mbit, 3.0 volt-only Flash memory organized as 1,048,576 bytes or 524,288 words.
The word-wide data (x16) appears on DQ15–DQ0; the byte-wide (x8) data appears on DQ7–DQ0. To
eliminate bus contention, the device has separate chip enable (CE#), write enable (WE#) and output enable
(OE#) controls.
The device requires only a
single 3.0 volt power supply
for both read and write functions. Internally
generated and regulated voltages are provided for the program and erase operations. No V
PP
is required for
program or erase operations. The device can also be programmed in standard EPROM programmers.
The device is entirely command set compatible with the
JEDEC single-power-supply Flash standard.
Commands are written to the command register using standard microprocessor write timings. Register
contents serve as input to an internal state-machine that controls the erase and programming circuitry. Write
cycles also internally latch addresses and data needed for the programming and erase operations. Reading
data out of the device is similar to reading from other Flash or EPROM devices.
Device programming occurs by executing the program command sequence. This initiates the
Embedded
Program
algorithm—an internal algorithm that automatically times the program pulse widths and verifies
proper cell margin. The
Unlock Bypass
mode facilitates faster programming times by requiring only two write
cycles to program data instead of four.
Device erasure occurs by executing the erase command sequence. This initiates the
Embedded Erase
algorithm—an internal algorithm that automatically preprograms the array (if it is not already programmed)
before executing the erase operation. During erase, the device automatically times the erase pulse widths
and verifies proper cell margin.
The host system can detect whether a program or erase operation is complete by observing the RY/BY# pin,
or by reading the DQ7 (Data# Polling) and DQ6 (toggle)
status bits.
After a program or erase cycle is
completed, the device is ready to read array data or accept another command.
The
sector erase architecture
allows memory sectors to be erased and reprogrammed without affecting the
data contents of other sectors. The device is fully erased when shipped from the factory.
Hardware data protection
measures include a low V
CC
detector that automatically inhibits write operations
during power transitions. The
hardware sector protection
feature disables both program and erase
operations in any combination of the sectors of memory. This can be achieved in-system or via programming
equipment.
The
Erase Suspend
feature enables the user to put erase on hold for any period of time to read data from, or
program data to, any sector that is not selected for erasure. True background erase can thus be achieved.
The
hardware RESET# pin
terminates any operation in progress and resets the internal state machine to
reading array data. The RESET# pin may be tied to the system reset circuitry. A system reset would thus also
reset the device, enabling the system microprocessor to read the boot-up firmware from the Flash memory.
The device offers two power-saving features. When addresses are stable for a specified amount of time, the
device enters the
automatic sleep mode.
The system can also place the device into the
standby mode.
Power consumption is greatly reduced in both these modes.
Spansion’s Flash technology combines years of Flash memory manufacturing experience to produce the
highest levels of quality, reliability and cost effectiveness. The device electrically erases all bits within a
sector simultaneously via Fowler-Nordheim tunneling. The data is programmed using hot electron injection.
1.2
Electrical Specifications
Refer to the S29AL008D data sheet, publication number S29AL008D_00, for full electrical specifications on
the S29AL008D in KGD form.
2
S29AL008D Known Good Die
S29AL008D_KGD_SP_A6 February 27, 2009
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