CA80C85B-6ED datasheet, PDF - EEWORLD Datasheet

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CA80C85B-6ED: DescriptionRISC Microprocessor, 8-Bit, 6MHz, CMOS, CDIP40; CategoryThe embedded processor and controller Microcontrollers and processors; File Size573KB，13 Pages; ManufacturerIDT (Integrated Device Technology)

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CA80C85B-6ED Overview

RISC Microprocessor, 8-Bit, 6MHz, CMOS, CDIP40

CA80C85B-6ED Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	IDT (Integrated Device Technology)
Parts packaging code	DIP
package instruction	SIDE BRAZED, CERAMIC, DIP-40
Contacts	40
Reach Compliance Code	unknown
bit size	8
JESD-30 code	R-XDIP-T40
JESD-609 code	e0
Number of terminals	40
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package body material	CERAMIC
encapsulated code	DIP
Encapsulate equivalent code	DIP40,.6
Package shape	RECTANGULAR
Package form	IN-LINE
power supply	5 V
Certification status	Not Qualified
speed	6 MHz
Nominal supply voltage	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
uPs/uCs/peripheral integrated circuit type	MICROPROCESSOR, RISC

CA80C85B-6ED Related Products

	CA80C85B-6ED	CA80C85B-6CD	CA80C85B-5CD	CA80C85B-5ID	CA80C85B-6ID	CA80C85B-5ED
Description	RISC Microprocessor, 8-Bit, 6MHz, CMOS, CDIP40	RISC Microprocessor, 8-Bit, 6MHz, CMOS, CDIP40	Microprocessor, 8-Bit, 5MHz, CMOS, CDIP40, SIDE BRAZED, CERAMIC, DIP-40	Microprocessor, 8-Bit, 5MHz, CMOS, CDIP40, SIDE BRAZED, CERAMIC, DIP-40	Microprocessor, 8-Bit, 6MHz, CMOS, CDIP40, SIDE BRAZED, CERAMIC, DIP-40	RISC Microprocessor, 8-Bit, 5MHz, CMOS, CDIP40
Is it Rohs certified?	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible
Parts packaging code	DIP	DIP	DIP	DIP	DIP	DIP
package instruction	SIDE BRAZED, CERAMIC, DIP-40	SIDE BRAZED, CERAMIC, DIP-40	DIP, DIP40,.6	DIP, DIP40,.6	DIP, DIP40,.6	SIDE BRAZED, CERAMIC, DIP-40
Contacts	40	40	40	40	40	40
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown	unknown
bit size	8	8	8	8	8	8
JESD-30 code	R-XDIP-T40	R-XDIP-T40	R-CDIP-T40	R-CDIP-T40	R-CDIP-T40	R-XDIP-T40
JESD-609 code	e0	e0	e0	e0	e0	e0
Number of terminals	40	40	40	40	40	40
Maximum operating temperature	125 °C	70 °C	70 °C	85 °C	85 °C	125 °C
Minimum operating temperature	-55 °C	-	-	-40 °C	-40 °C	-55 °C
Package body material	CERAMIC	CERAMIC	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC
encapsulated code	DIP	DIP	DIP	DIP	DIP	DIP
Encapsulate equivalent code	DIP40,.6	DIP40,.6	DIP40,.6	DIP40,.6	DIP40,.6	DIP40,.6
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	IN-LINE	IN-LINE	IN-LINE	IN-LINE	IN-LINE	IN-LINE
power supply	5 V	5 V	5 V	5 V	5 V	5 V
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
speed	6 MHz	6 MHz	5 MHz	5 MHz	6 MHz	5 MHz
Nominal supply voltage	5 V	5 V	5 V	5 V	5 V	5 V
surface mount	NO	NO	NO	NO	NO	NO
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	MILITARY	COMMERCIAL	COMMERCIAL	INDUSTRIAL	INDUSTRIAL	MILITARY
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE
Terminal pitch	2.54 mm	2.54 mm	2.54 mm	2.54 mm	2.54 mm	2.54 mm
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL
uPs/uCs/peripheral integrated circuit type	MICROPROCESSOR, RISC	MICROPROCESSOR, RISC	MICROPROCESSOR	MICROPROCESSOR	MICROPROCESSOR	MICROPROCESSOR, RISC
Maker	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	-	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)
Maximum slew rate	-	-	21 mA	29 mA	29 mA	32 mA

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