10-Bit, 40/65/80/105 MSPS
3 V Dual Analog-to-Digital Converter
AD9218
FEATURES
Dual 10-bit, 40 MSPS, 65 MSPS, 80 MSPS, and 105 MSPS ADC
Low power: 275 mW at 105 MSPS per channel
On-chip reference and track-and-hold
300 MHz analog bandwidth each channel
SNR = 57 dB @ 41 MHz, Encode = 80 MSPS
1 V p-p or 2 V p-p analog input range each channel
3.0 V single-supply operation (2.7 V to 3.6 V)
Power-down mode for single-channel operation
Twos complement or offset binary output mode
Output data alignment mode
Pin compatible with the 8-bit AD9288
–75 dBc crosstalk between channels
ENCODE A
A
IN
A
A
IN
A
REF
IN
A
REF
OUT
REF
IN
B
A
IN
B
A
IN
B
ENCODE B
T/H
REF
FUNCTIONAL BLOCK DIAGRAM
TIMING
AD9218
ADC
OUTPUT
/ REGISTER /
10
10
D9
A
TO D0
A
USER
SELECT NO. 1
USER
SELECT NO. 2
DATA
FORMAT/
GAIN
OUTPUT /
/
10 REGISTER 10
D9
B
TO D0
B
T/H
ADC
V
D
APPLICATIONS
Battery-powered instruments
Hand-held scopemeters
Low cost digital oscilloscopes
I and Q communications
Ultrasound equipment
GND
V
DD
Figure 1.
GENERAL DESCRIPTION
The AD9218 is a dual 10-bit monolithic sampling analog-to-
digital converter with on-chip track-and-hold circuits. The
product is low cost, low power, and is small and easy to use. The
AD9218 operates at a 105 MSPS conversion rate with
outstanding dynamic performance over its full operating range.
Each channel can be operated independently.
The ADC requires only a single 3.0 V (2.7 V to 3.6 V) power
supply and a clock for full operation. No external reference or
driver components are required for many applications. The
digital outputs are TTL/CMOS compatible and a separate
output power supply pin supports interfacing with 3.3 V or
2.5 V logic.
The clock input is TTL/CMOS compatible and the 10-bit digital
outputs can be operated from 3.0 V (2.5 V to 3.6 V) supplies.
User-selectable options offer a combination of power-down
modes, digital data formats, and digital data timing schemes.
In power-down mode, the digital outputs are driven to a high
impedance state.
PRODUCT HIGHLIGHTS
1.
Low Power. Only 275 mW power dissipation per channel
at 105 MSPS. Other speed grades proportionally scaled
down while maintaining high ac performance.
Pin Compatibility Upgrade. Allows easy migration from 8-bit
to 10-bit devices. Pin compatible with the 8-bit AD9288
dual ADC.
Easy to Use. On-chip reference and user controls provide
flexibility in system design.
High Performance. Maintains 54 dB SNR at 105 MSPS
with a Nyquist input.
Channel Crosstalk. Very low at –75 dBc.
Fabricated on an Advanced CMOS Process. Available in a
48-lead low profile quad flat package (7 mm × 7 mm
LQFP) specified over the industrial temperature range
(−40°C to +85°C).
2.
3.
4.
5.
6.
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2006 Analog Devices, Inc. All rights reserved.
02001-001
TIMING
AD9218* PRODUCT PAGE QUICK LINKS
Last Content Update: 09/27/2017
COMPARABLE PARTS
View a parametric search of comparable parts.
REFERENCE MATERIALS
Technical Articles
•
Correlating High-Speed ADC Performance to Multicarrier
3G Requirements
•
DNL and Some of its Effects on Converter Performance
•
MS-2210: Designing Power Supplies for High Speed ADC
•
Single Chip Realizes Direct-Conversion Rx
DOCUMENTATION
Application Notes
•
AN-282: Fundamentals of Sampled Data Systems
•
AN-345: Grounding for Low-and-High-Frequency Circuits
•
AN-501: Aperture Uncertainty and ADC System
Performance
•
AN-715: A First Approach to IBIS Models: What They Are
and How They Are Generated
•
AN-737: How ADIsimADC Models an ADC
•
AN-741: Little Known Characteristics of Phase Noise
•
AN-756: Sampled Systems and the Effects of Clock Phase
Noise and Jitter
•
AN-835: Understanding High Speed ADC Testing and
Evaluation
•
AN-905: Visual Analog Converter Evaluation Tool Version
1.0 User Manual
•
AN-935: Designing an ADC Transformer-Coupled Front
End
Data Sheet
•
AD9218: 10-Bit, 40/65/80/105 MSPS 3 V Dual Analog-to-
Digital Converter Data Sheet
DESIGN RESOURCES
•
AD9218 Material Declaration
•
PCN-PDN Information
•
Quality And Reliability
•
Symbols and Footprints
DISCUSSIONS
View all AD9218 EngineerZone Discussions.
SAMPLE AND BUY
Visit the product page to see pricing options.
TECHNICAL SUPPORT
Submit a technical question or find your regional support
number.
TOOLS AND SIMULATIONS
•
Visual Analog
•
AD9218 IBIS Models
DOCUMENT FEEDBACK
Submit feedback for this data sheet.
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AD9218
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
DC Specifications ......................................................................... 3
Digital Specifications ................................................................... 4
AC Specifications.......................................................................... 5
Switching Specifications .............................................................. 6
Timing Diagrams.......................................................................... 6
Absolute Maximum Ratings............................................................ 8
Explanation of Test Levels ........................................................... 8
ESD Caution.................................................................................. 8
Pin Configuration and Function Descriptions............................. 9
Terminology .................................................................................... 10
Equivalent Circuits ......................................................................... 12
Typical Performance Characteristics ........................................... 13
Theory of Operation ...................................................................... 18
Using the AD9218 ENCODE Input......................................... 18
Digital Outputs ........................................................................... 18
Analog Input ............................................................................... 18
Voltage Reference ....................................................................... 19
Timing ......................................................................................... 19
User Select Options.................................................................... 19
Application Information ........................................................... 19
AD9218/AD9288 Customer PCB BOM...................................... 20
Evaluation Board ............................................................................ 21
Power Connector........................................................................ 21
Analog Inputs ............................................................................. 21
Voltage Reference ....................................................................... 21
Clocking....................................................................................... 21
Data Outputs............................................................................... 21
Data Format/Gain ...................................................................... 21
Timing ......................................................................................... 21
Troubleshooting.......................................................................... 21
Outline Dimensions ....................................................................... 25
Ordering Guide .......................................................................... 25
REVISION HISTORY
12/06—Rev. B to Rev. C
Updated Format..................................................................Universal
Changes to DC Specifications......................................................... 3
1/04—Rev. A. to Rev. B
Updated format...................................................................Universal
Changes to General Description .................................................... 1
Changes to DC Specifications......................................................... 3
Changes to Switching Specifications.............................................. 6
Added AD9218/AD9288 Customer PCB BOM section ........... 20
Added Evaluation Board section .................................................. 21
7/03—Rev. 0 to Rev. A
Updated Ordering Guide................................................................. 6
Changes to Terminology section ................................................... .8
Changes to Figure 17b.................................................................... 19
Updated Outline Dimensions ....................................................... 24
Rev. C | Page 2 of 28
AD9218
SPECIFICATIONS
DC SPECIFICATIONS
V
DD
= 3.0 V, V
D
= 3.0 V; external reference, unless otherwise noted.
Table 1.
Parameter
RESOLUTION
ACCURACY
No Missing Codes
1
Offset Error
2
Gain Error
2
Differential Nonlinearity
(DNL)
Integral Nonlinearity
(INL)
TEMPERATURE DRIFT
Offset Error
Gain Error
2
Reference
REFERENCE
Internal Reference Voltage
(REF
OUT
)
Input Resistance (REF
IN
A,
REF
IN
B)
ANALOG INPUTS
Differential Input Voltage
Range (A
IN,
A
IN
)
3
Common-Mode Voltage
3
Input Resistance
Input Capacitance
POWER SUPPLY
V
D
V
DD
Supply Currents
IV
D
(V
D
= 3.0 V)
4
IV
DD
(V
DD
= 3.0 V)
4
Power Dissipation DC
5
IV
D
Power-Down Current
6
Power Supply Rejection
Ratio
1
Temp
Test
Level
Min
AD9218BST-40/-65
Typ
Max
10
Guaranteed, not tested
2
18
3
8
±0.3/±0.6
1/1.3
±0.8
±0.3/±1
±1
10
80
40
Min
AD9218BST-80/-105
Typ
Max
10
Guaranteed, not tested
2
18
3.5
8
±0.5/±0.8
1.2/1.7
±0.6/±0.9
±0.75/±2
±1/±2.3
4
100
40
Unit
Bits
Full
25°C
25°C
25°C
Full
25°C
Full
Full
Full
Full
25°C
Full
VI
I
I
I
VI
I
VI
V
V
V
I
VI
–18
–2
–1
–18
–2
–1
LSB
% FS
LSB
LSB
LSB
LSB
ppm/°C
ppm/°C
ppm/°C
–1/–1.6
1/1.6
–1.35/–2.7
+1.35/2.7
1.18
9
1.24
11
1.28
13
1.18
9
1.24
11
1.28
13
V
kΩ
Full
Full
Full
25°C
Full
Full
Full
25°C
Full
Full
25°C
V
V
VI
V
IV
IV
VI
V
VI
VI
I
1 or 2
V
D
/3
10
3
3
3
108/117
7/11
325/350
20
±1
1
V
D
/3
10
3
3
3
172/183
13/17
515/550
22
±1
V
V
kΩ
pF
V
V
mA
mA
mW
mA
mV/V
8
14
8
14
2.7
2.7
3.6
3.6
113/130
340/390
2.7
2.7
3.6
3.6
175/188
525/565
No missing codes across industrial temperature range guaranteed for 40 MSPS, 65 MSPS, and 80 MSPS grades. No missing codes at room temperature guaranteed for
105 MSPS grade.
2
Gain error and gain temperature coefficients are based on the ADC only (with a fixed 1.25 V external reference) 65 grade in 2 V p-p range, 40, 80, 105 grades in 1 V p-p range.
3
(A
IN
–A
IN
) = ±0.5 V in 1 V range (full scale), (A
IN
– A
IN
) = ±1 V in 2 V range (full scale). The analog inputs self-bias to V
D
/3. This common-mode voltage can be overdriven
externally by a low impedance source by ±300 mV (differential drive, gain = 1) or ±150 mV (differential drive, gain = 2).
4
AC power dissipation measured with rated encode and a 10.3 MHz analog input @ 0.5 dBFS, C
LOAD
= 5 pF.
5
DC power dissipation measured with rated encode and a dc analog input (outputs static, IV
DD
= 0).
6
In power-down state, IV
DD
= ±10 μA typical (all grades).
Rev. C | Page 3 of 28
AD9218
DIGITAL SPECIFICATIONS
V
DD
= 3.0 V, V
D
= 3.0 V; external reference, unless otherwise noted.
Table 2.
Parameter
DIGITAL INPUTS
Encode Input Common
Mode
Encode 1 Voltage
Encode 0 Voltage
Encode Input Resistance
Logic 1 Voltage—S1, S2,
DFS
Logic 0 Voltage—S1, S2,
DFS
Logic 1 Current—S1
Logic 0 Current—S1
Logic 1 Current—S2
Logic 0 Current—S2
Logic 1 Current—DFS
Logic 0 Current—DFS
Input Capacitance—S1,
S2, Encode Inputs
Input Capacitance DFS
DIGITAL OUTPUTS
Logic 1 Voltage
Logic 0 Voltage
Output Coding
Temp
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
25°C
25°C
Full
Full
Test
Level
V
VI
VI
VI
VI
VI
VI
VI
VI
VI
VI
VI
V
V
VI
VI
2.45
0.05
Twos complement or offset binary
–50
–400
50
–50
30
–400
±0
–230
230
±0
100
–230
2
4.5
2.45
0.05
Twos complement or offset binary
2
1.8
2
2.0
0.8
2.3
Min
AD9218BST-40/-65
Typ
Max
V
D
/2
2
1.8
2
2.0
0.8
2.3
Min
AD9218BST-80/-105
Typ
Max
V
D
/2
Unit
V
V
V
kΩ
V
V
μA
μA
μA
μA
μA
μA
pF
pF
V
V
0.8
50
–50
400
50
200
–50
–50
–400
50
–50
30
–400
±0
–230
230
±0
100
–230
2
4.5
0.8
50
–50
400
50
200
–50
Rev. C | Page 4 of 28
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