UNISONIC TECHNOLOGIES CO.,
UA1029
LOW FREQUENCY POWER
AMPLIFIER
DESCRIPTION
The UTC
UA1029
is a low frequency power amplier and
developed for portable radio cassette tape recorder with
power ON/OFF switch.
The audio power IC has built-in two channels and thermal
shut down protection circuit.
LINEAR INTEGRATED CIRCUIT
HSIP-15
FEATURES
* High Power
: P
OUT
(1) = 2.5W (Typ.)
(V
CC
= 9V, R
L
= 4Ω, f = 1kHz, THD = 10%)
: P
OUT
(2) = 4.6W (Typ.)
(V
CC
= 12V, R
L
= 4Ω, f = 1kHz, THD = 10%)
* Low Popping Noise at Power ON
* Small Quiescent Current
: I
Q
= 21mA (Typ.) (V
CC
= 15V, V
in
= 0)
* Soft Clip
* Thermal Shut Down Protection
* Best for Supply Voltage 9V, 12V
* Operation Supply Voltage Range from 6V to 15V
HSIP-14
*Pb-free plating product number: UA1029L
PIN CONFIGURATION
PIN NO.
HSIP-14 HSIP-15
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
PIN NAME
NC
B.S. 2
OUT 2
Vcc 1
OUT 1
B.S.1
Power-GND
Vcc 2
RIPPLE
NF1
IN 1
IN 2
NF 2
Pre-GND 1
Pre-GND 2
ORDERING INFORMATION
Ordering Number
Normal
Lead Free Plating
UA1029-H14-T
UA1029L-H14-T
UA1029-H15-T
UA1029L-H15-T
Package
HSIP-14
HSIP-15
Packing
Tube
Tube
www.unisonic.com.tw
Copyright © 2005 Unisonic Technologies Co.,
1
QW-R107-033,A
UA1029
BLOCK DIAGRAM
V
CC2
8
V
CC1
4
LINEAR INTEGRATED CIRCUIT
6
IN1
NF1
11
10
+
Ch-1
-
5
B.S.1
OUT1
RIPPLE
9
BIAS CIRCUIT
AND TSD
7
Power-GND
IN2
NF2
12
13
+
Ch-2
-
2
B.S.2
3
OUT2
14
Pre-GND1.
15
Pre-GND2.
* The diagram show as an example of HSIP-15 package, Pin 1 is not connecting.
In HSIP-14 package, above pin number would be advanced. Refer to pin configuration at first page for detail.
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
2
QW-R107-033,A
UA1029
ABSOLUTE MAXIMUM RATINGS
(Ta = 25℃)
PARAMETER
SYMBOL
Supply Voltage
V
CC
Peak Output Current
I
O (peak)
Power Dissipation(Note)
P
D
Operating Temperature
T
OPR
Storage Temperature
T
STG
Note: Reduced by 120mW/℃ in above Ta=25℃.
LINEAR INTEGRATED CIRCUIT
RATINGS
20
2.5
15
0 ~ +70
-40 ~ +150
UNIT
V
A
W
℃
℃
ELECTRICAL CHARACTERISTICS
(Ta=25℃, V
CC
=9V, R
L
=4Ω, R
g
=600Ω, f=1kHz, R
F
=120Ω, unless otherwise specified.)
PARAMETER
Quiescent Current
Output Power
Total Harmonic Distortion
Voltage Gain
Input Resistance
Output Noise Voltage
Ripple Rejection Ratio
Cross Talk
Input Offset Voltage
Stand-by Current
SYMBOL
I
D
P
OUT(1)
P
OUT(2)
THD
G
V (1)
G
V (2)
R
IN
V
NO
RR
C.T.
V
11
, V
12
I
STN-BY
TEST CONDITIONS
V
IN
= 0
THD = 10%, V
CC
=9V
THD = 10%, V
CC
= 12V
P
OUT
= 0.4W/ch
R
F
= 120Ω, V
OUT
= 0.775Vrms (0dBm)
R
F
= 0, V
out
= 0.775Vrms (0dBm)
R
G
= 10kΩ, BW = 20Hz ~ 20kHz
R
G
= 600Ω, f
RIPPLE
= 100kHz
R
G
= 600Ω, amp1
2
V
OUT
= 0.775Vrms (0dBm)
SW1
OFF
MIN
2.0
TYP
25
2.5
4.6
0.2
45
56.5
30
0.3
-52
-50
30
1
60
MAX
45
UNIT
mA
W
1.0
47
%
dB
kΩ
mVrms
dB
dB
mV
µA
43
1.0
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
3
QW-R107-033,A
UA1029
TEST CIRCUIT
SW1
V
CC2
LINEAR INTEGRATED CIRCUIT
V
CC1
+
-
(*) C
IN
IN-1
-
+
8
4
B.S.1
6
-
11
R
f1
10
IN1
NF1
45Ω
+
Ch-1
-
30kΩ
5
C6
0.15μF
Power-GND
1000μF
R
L
120Ω
+ C1
47μF
-
RIPPLE
9
+
-
(*) C
IN
-
+
BIAS CIRCUIT
AND TSD
7
C3
47μF
IN2
12
120Ω
NF2
13
45Ω
+
Ch-2
-
2
30kΩ
B.S.2
3
C5
100μF +
-
-
+
IN-2
OUT2
C9
1000μF
C7
0.15μF
R
L
+
-
C2
47μF
14
Pre-GND1.
15
Pre-GND2.
(*) This IC can be used without coupling capacitor (C
IN
).
If volume slide noise occurred by input offset voltage is undesirable, it needs to use the capacitor (C
IN
).
(**) The condenser between the pin 8 and the GND (C11) is for reducing POP noise when the power ON/OFF switch
(SW1) is set to ON/OFF.
(***) The test circuit show as an example of HSIP-15 package, Pin 1 is unused.
In HSIP-14 package, above pin assignment should be minus one. Refer to pin configuration at first page for
detail.
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
-
+
OUT1
+ C4
100μF
-
C11 (**)
100μF
+
C10
1000μF
C8
OUT-1
OUT-2
4
QW-R107-033,A
UA1029
LINEAR INTEGRATED CIRCUIT
APPLICATION INFORMATION (Example by HSIP-15 package)
1. Adjustment of voltage gain
The voltage gain G
V
is obtained by R1, R2 and R
F
as below. By increasing R
F
, reduction of G
V
is possible. 40dB or
over in use is recommended.
R
F
+ R1 + R2
G
V
= 20 log
R
F
+ R1
Sine oscillation is probable as a result of feedback in crease.
INPUT
11/12
R
f
10/13
+
-
C
NF
47μF
R1
45Ω
+
AMP
-
R2
30kΩ
3/5
OUTPUT
Fig.1
2. Input stage
The input circuit of this IC is as shown as below.
PNP T
r
: TR1 is provided in the input circuit so as to make its usage possible without the input coupling capacitor.
However, at Pin 11 and Pin 12(HSIP-15, Pin 10 and Pin 11 for HSIP-14), max 60 mV offset voltage is produced.
Fig.2 illustrate the input circuit of UTC UA1029. A offset voltage of 60mV max is possible. TR1 is featured to
eliminate the usage of coupling capacitor.
OUTPUT
30kΩ
INPUT
-
TR2
TR3
3/ 5
+
11/12
30kΩ
14/15
GND
TR1
To DRIVER
45Ω
To BIAS
NF
10/13
R
f
+
-
47μF
C
IN
Fig. 2 Pin Number by HSIP-15 package
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
5
QW-R107-033,A
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