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Datasheet> All Categories > Analog mixed-signal IC> Amplifier circuit> HA5351IP
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HA5351IP

Description
SAMPLE AND HOLD AMPLIFIER, 0.09us ACQUISITION TIME, PDIP8, PLASTIC, DIP-8
CategoryAnalog mixed-signal IC    Amplifier circuit   
File Size779KB，9 Pages
ManufacturerRochester Electronics
Websitehttps://www.rocelec.com/
Download Datasheet Parametric View All

HA5351IP Overview

SAMPLE AND HOLD AMPLIFIER, 0.09us ACQUISITION TIME, PDIP8, PLASTIC, DIP-8

HA5351IP Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
MakerRochester Electronics
Parts packaging codeDIP
package instructionPLASTIC, DIP-8
Contacts8
Reach Compliance Codeunknown
Maximum acquisition time0.1 µs
Nominal acquisition time0.09 µs
Amplifier typeSAMPLE AND HOLD CIRCUIT
Maximum analog input voltage2.5 V
Minimum analog input voltage-2.5 V
maximum rate of descent2 V/s
JESD-30 codeR-PDIP-T8
JESD-609 codee0
length9.585 mm
Humidity sensitivity levelNOT APPLICABLE
Negative supply voltage upper limit-5.5 V
Nominal Negative Supply Voltage (Vsup)-5 V
Number of functions1
Number of terminals8
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Package shapeRECTANGULAR
Package formIN-LINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Certification statusCOMMERCIAL
Sample and hold/Track and holdSAMPLE
Maximum seat height5.33 mm
Supply voltage upper limit5.5 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyBICMOS
Temperature levelINDUSTRIAL
Terminal surfaceTIN LEAD
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width7.62 mm

HA5351IP Preview

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HA5351
Data Sheet
May 1999
File Number
3690.7
64ns Sample and Hold Amplifier
The HA5351 is a fast acquisition, wide bandwidth sample
and hold amplifier, built with the Intersil HBC-10 BiCMOS
process. This sample and hold amplifier offers a combination
of desirable features; fast acquisition time (70ns to 0.01%
maximum), excellent DC precision and extremely low power
dissipation, making it ideal for use in systems that sample
multiple signals and require low power.
The HA5351 is in an open loop configuration with fully
differential inputs providing flexibility for user defined
feedback. In unity gain the HA5351 is completely self-
contained and requires no external components. The on-
chip 15pF hold capacitor is completely isolated to minimizing
droop rate and reduce sensitivity to pedestal error. The
HA5351 is available in 8 lead PDIP and SOIC packages for
minimizing board space and ease of layout.
Features
• Fast Acquisition to 0.01% . . . . . . . . . . . . . . . . . 70ns (Max)
• Low Offset Error . . . . . . . . . . . . . . . . . . . . . . .
±2mV
(Max)
• Low Pedestal Error . . . . . . . . . . . . . . . . . . . .
±10mV
(Max)
• Low Droop Rate . . . . . . . . . . . . . . . . . . . . . . 2µV/µs (Max)
• Wide Unity Gain Bandwidth . . . . . . . . . . . . . . . . . . 40MHz
• Low Power Dissipation . . . . . . . . . . . . . . . 220mW (Max)
• Total Harmonic Distortion (Hold Mode) . . . . . . . . . -72dBc
- (V
IN
= 5V
P-P
at 1MHz)
• Fully Differential Inputs
• On Chip Hold Capacitor
Applications
• Synchronous Sampling
• Wide Bandwidth A/D Conversion
• Deglitching
• Peak Detection
• High Speed DC Restore
Ordering Information
PART NUMBER
(BRAND)
HA5351IP
HA5351IB
(H5351)
TEMP.
RANGE (
o
C)
-40 to 85
-40 to 85
PACKAGE
8 Ld PDIP
8 Ld SOIC
PKG.
NO.
E8.3
M8.15
Functional Diagram
V+
6
V-
3
15pF
8
+
G
M
1
+IN
5
BUFFER
HA5351
7
GND
-
-
+
Pinout
HA5351
(PDIP, SOIC)
TOP VIEW)
+IN
NC
4
OUT
V-
OUT
1
2
3
4
8
7
6
5
-IN
GND
V+
S/H
CTRL
-IN
A
V
S/H
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
|
Copyright
©
Intersil Corporation 1999
HA5351
Absolute Maximum Ratings
Voltage Between V+ and V- Terminals. . . . . . . . . . . . . . . . . . . +11V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6V
Voltage Between Sample and Hold Control and Ground . . . . . +5.5V
Output Current, Continuous . . . . . . . . . . . . . . . . . . . . . . . . . .
±37mA
Thermal Information
Thermal Resistance (Typical, Note 1)
θ
JA
(
o
C/W)
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
120
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
160
Maximum Junction Temperature (Plastic Package) . . . . . . . .150
o
C
Maximum Storage Temperature Range . . . . . . . . . . -65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300
o
C
(SOIC - Lead Tips Only)
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -40
o
C to 85
o
C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
Test Conditions: V
SUPPLY
=
±5V;
C
H
= Internal = 15pF, Digital Input: V
IL
= fc0V (Sample), V
IH
= 4.0V (Hold).
Non-Inverting Unity Gain Configuration (Output Tied to -Input), C
L
= 5pF,
Unless Otherwise Specified
TEMP.
(
o
C)
HA5351I
MIN
TYP
MAX
UNITS
PARAMETER
INPUT CHARACTERISTICS
Input Voltage Range
Input Resistance (Note 2)
Input Capacitance
Input Offset Voltage
TEST CONDITIONS
Full
25
25
25
Full
-2.5
100
-
-2
-3.0
-
-
-1.5
-2.5
60
-
500
-
-
-
15
2.5
-
-
80
+2.5
-
5
2
3.0
-
5
+1.5
+2.5
-
V
kΩ
pF
mV
mV
µV/
o
C
µA
µA
V
dB
Offset Voltage Temperature Coefficient
Bias Current
Offset Current
Common Mode Range
Common Mode Rejection Ratio
TRANSFER CHARACTERISTICS
Large Signal Voltage Gain
V
OUT
=
±2.5V
±2.5V,
Note 3
Full
Full
Full
Full
Full
25
Full
95
85
-
108
-
40
-
-
-
dB
dB
MHz
Unity Gain -3dB Bandwidth
TRANSIENT RESPONSE
Rise Time
Overshoot
Slew Rate
DIGITAL INPUT CHARACTERISTICS
Input Voltage
V
IH
200mV Step
200mV Step
5V Step
25
25
25
Full
-
0
88
8.5
-
105
-
30
-
ns
%
V/µs
25, 85
-40
2.1
2.4
0
-1.0
-1.0
-
-
-
-
-
5.0
5.0
0.8
1.0
1.0
V
V
V
µA
µA
V
IL
Input Current
V
IL
= 0V
V
IH
= 5V
OUTPUT CHARACTERISTICS
Output Voltage
Output Current
R
L
= 510Ω
R
L
= 100Ω
Full
Full
Full
Full
25, 85
-40
-3.0
20
15
-
25
-
+3.0
-
-
V
mA
mA
2
HA5351
Electrical Specifications
Test Conditions: V
SUPPLY
=
±5V;
C
H
= Internal = 15pF, Digital Input: V
IL
= fc0V (Sample), V
IH
= 4.0V (Hold).
Non-Inverting Unity Gain Configuration (Output Tied to -Input), C
L
= 5pF,
Unless Otherwise Specified
(Continued)
TEMP.
(
o
C)
Full
25
25
25
HA5351I
MIN
-
-
-
-
TYP
13
0.02
325
325
MAX
-
-
-
-
UNITS
MHz
Ω
µV
RMS
µV
RMS
PARAMETER
Full Power Bandwidth
Output Resistance
Total Output Noise
(DC to 10MHz)
DISTORTION CHARACTERISTICS
SAMPLE MODE
Total Harmonic Distortion
TEST CONDITIONS
5V
P-P
, A
V
= +1, -3dB
Hold Mode
Sample Mode
Hold Mode
V
IN
= 4.5V
P-P
, f
IN
= 100kHz
V
IN
= 5V
P-P
, f
IN
= 1MHz
V
IN
= 1V
P-P
, f
IN
= 10MHz
25
25
25
25
-
-
-
-
-80
-74
-57
73
-
-
-
-
dBc
dBc
dBc
dB
Signal to Noise Ratio
(RMS Signal to RMS Noise)
HOLD MODE (50% Duty Cycle S/H)
Total Harmonic Distortion
V
IN
= 4.5V
P-P
, f
IN
= 100kHz
V
IN
= 4.5V
P-P
, f
IN
= 100kHz,
f
S
≅
100kHz
V
IN
= 5V
P-P
, f
IN
= 1MHz,
f
S
≅
1MHz
V
IN
= 1V
P-P
, f
IN
= 10MHz,
f
S
≅
1MHz
25
25
25
25
-
-
-
-
-78
-72
-51
70
-
-
-
-
dBc
dBc
dBc
dB
Signal to Noise Ratio
(RMS Signal to RMS Noise)
SAMPLE AND HOLD CHARACTERISTICS
Acquisition Time
V
IN
= 4.5V
P-P
, f
IN
= 100kHz,
f
S
≅
100kHz
0V to 2.0V Step to
±1mV
0V to 2.0V Step to 0.01%
(±200µV)
-2.5V to +2.5V Step to 0.01%
(±500µV)
25
25
25
25
Full
-
-
-
-
-2
-10
-
-
-
-
-
53
64
90
0.3
-
-
50
72
+1
10
10
-
70
100
-
2
+10
-
-
-
-
20
ns
ns
ns
µV/µs
µV/µs
mV
ns
dB
ns
ns
ps
Droop Rate
Hold Step Error
Hold Mode Settling Time
Hold Mode Feedthrough
EADT (Effective Aperture Delay Time)
Aperture Time (Note 2)
Aperture Uncertainty
POWER SUPPLY CHARACTERISTICS
Positive Supply Current
Negative Supply Current
PSRR
NOTES:
V
IL
= 0V, V
IH
= 4.0V, t
R
= 5ns
To
±1mV
5V
P-P
, 500kHz, Sine
Full
25
25
25
25
25
Full
Full
10% Delta
Full
-
-
60
20
20
74
22
22
-
mA
mA
dB
2. Derived from Computer Simulation only, not tested.
3. +CMRR is measured from 0V to +2.5V, -CMRR is measured from 0V to -2.5V.
3
HA5351
Typical Performance Curves
2
OUTPUT (V)
OUTPUT (V)
0
100
200
300
TIME (ns)
400
500
0.1
0
0.0
-2
-0.1
200
400
TIME (ns)
600
FIGURE 1. LARGE SIGNAL RESPONSE
FIGURE 2. SMALL SIGNAL RESPONSE
2
60
0
40
GAIN (dB)
-2
40.163156MHz
-3dB
GAIN (dB)
GAIN
0dB AT 21.34MHz
20
0
-30
-60
0
-6
-20
-8
100K
1M
10M
100M
1K
10K
100K
PHASE
-119.86 DEG
1M
10M
-90
-120
-150
-180
100M
PHASE (DEGREES)
±6
-4
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 3. UNITY GAIN FREQUENCY RESPONSE
FIGURE 4. CLOSED LOOP GAIN/PHASE A
V
= +1000
2
60
200mV
P-P
-3dB BANDWIDTH (MHz)
50
13.241189MHz
-3dB
40
30
20
10
0
±3.5
4 TYPICAL UNITS
0
GAIN (dB)
-2
-4
-6
-8
10K
100K
1M
FREQUENCY (Hz)
10M
100M
±4
±4.5
±5
SUPPLY VOLTAGE (V)
±5.5
FIGURE 5. 5V
P-P
FULL POWER FREQUENCY RESPONSE
FIGURE 6. -3dB BANDWIDTH vs SUPPLY VOLTAGE
4
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