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SN74H101N

Description
TTL/H/L SERIES, NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP14
Categorylogic    logic   
File Size80KB,3 Pages
ManufacturerTexas Instruments
Websitehttp://www.ti.com.cn/
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SN74H101N Overview

TTL/H/L SERIES, NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP14

SN74H101N Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerTexas Instruments
package instructionDIP, DIP14,.3
Reach Compliance Codenot_compliant
Other features2-2-IN AND-OR GATED J/K INPUTS
seriesTTL/H/L
JESD-30 codeR-PDIP-T14
length19.305 mm
Load capacitance (CL)25 pF
Logic integrated circuit typeJ-K FLIP-FLOP
Number of digits2
Number of functions1
Number of terminals14
Maximum operating temperature70 °C
Minimum operating temperature
Output polarityCOMPLEMENTARY
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Encapsulate equivalent codeDIP14,.3
Package shapeRECTANGULAR
Package formIN-LINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Maximum supply current (ICC)38 mA
propagation delay (tpd)20 ns
Certification statusNot Qualified
Maximum seat height5.08 mm
Maximum supply voltage (Vsup)5.25 V
Minimum supply voltage (Vsup)4.75 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyTTL
Temperature levelCOMMERCIAL
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
Trigger typeNEGATIVE EDGE
width7.62 mm
minfmax40 MHz

SN74H101N Related Products

SN74H101N SN54H101J SN54H101W SN74H101J
Description TTL/H/L SERIES, NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP14 TTL/H/L SERIES, NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP14 TTL/H/L SERIES, NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDFP14 TTL/H/L SERIES, NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP14
Is it Rohs certified? incompatible incompatible incompatible incompatible
Maker Texas Instruments Texas Instruments Texas Instruments Texas Instruments
package instruction DIP, DIP14,.3 DIP, DIP14,.3 DFP, FL14,.3 DIP, DIP14,.3
Reach Compliance Code not_compliant not_compliant _compli _compli
Other features 2-2-IN AND-OR GATED J/K INPUTS 2-2-IN AND-OR GATED J/K INPUTS 2-2-IN AND-OR GATED J/K INPUTS 2-2-IN AND-OR GATED J/K INPUTS
series TTL/H/L TTL/H/L TTL/H/L TTL/H/L
JESD-30 code R-PDIP-T14 R-GDIP-T14 R-GDFP-F14 R-GDIP-T14
length 19.305 mm 19.56 mm 9.21 mm 19.56 mm
Load capacitance (CL) 25 pF 25 pF 25 pF 25 pF
Logic integrated circuit type J-K FLIP-FLOP J-K FLIP-FLOP J-K FLIP-FLOP J-K FLIP-FLOP
Number of digits 2 2 2 2
Number of functions 1 1 1 1
Number of terminals 14 14 14 14
Maximum operating temperature 70 °C 125 °C 125 °C 70 °C
Output polarity COMPLEMENTARY COMPLEMENTARY COMPLEMENTARY COMPLEMENTARY
Package body material PLASTIC/EPOXY CERAMIC, GLASS-SEALED CERAMIC, GLASS-SEALED CERAMIC, GLASS-SEALED
encapsulated code DIP DIP DFP DIP
Encapsulate equivalent code DIP14,.3 DIP14,.3 FL14,.3 DIP14,.3
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form IN-LINE IN-LINE FLATPACK IN-LINE
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
Maximum supply current (ICC) 38 mA 38 mA 38 mA 38 mA
propagation delay (tpd) 20 ns 20 ns 20 ns 20 ns
Certification status Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 5.08 mm 5.08 mm 2.03 mm 5.08 mm
Maximum supply voltage (Vsup) 5.25 V 5.5 V 5.5 V 5.25 V
Minimum supply voltage (Vsup) 4.75 V 4.5 V 4.5 V 4.75 V
Nominal supply voltage (Vsup) 5 V 5 V 5 V 5 V
surface mount NO NO YES NO
technology TTL TTL TTL TTL
Temperature level COMMERCIAL MILITARY MILITARY COMMERCIAL
Terminal form THROUGH-HOLE THROUGH-HOLE FLAT THROUGH-HOLE
Terminal pitch 2.54 mm 2.54 mm 1.27 mm 2.54 mm
Terminal location DUAL DUAL DUAL DUAL
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
Trigger type NEGATIVE EDGE NEGATIVE EDGE NEGATIVE EDGE NEGATIVE EDGE
width 7.62 mm 7.62 mm 6.29 mm 7.62 mm
minfmax 40 MHz 40 MHz 40 MHz 40 MHz
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