GS78116B
BGA
Commercial Temp
Industrial Temp
Features
• Fast access time: 10, 12, 15 ns
• CMOS low power operation: 300/250/220/180 mA at
minimum cycle time
• Single 3.3 V ± 0.3 V power supply
• All inputs and outputs are TTL-compatible
• Fully static operation
• Industrial Temperature Option: –40° to 85°C
• 14 mm x 22 mm, 119-Bump, 1.27 mm Pitch Ball Grid Array
package
512K x 16
8Mb Asynchronous SRAM
Pin Descriptions
Symbol
A
0
to A
18
DQ
1
to DQ
16
CE
WE
OE
V
DD
V
SS
NC
10, 12, 15 ns
3.3 V V
DD
Description
Address input
Data input/output
Chip enable input
Write enable input
Output enable input
+3.3 V power supply
Ground
No connect
Description
The GS78116 is a high speed CMOS static RAM organized as
524,288-words by 16-bits. Static design eliminates the need for
external clocks or timing strobes. The GS78116 operates on a
single 3.3 V power supply and all inputs and outputs are TTL-
compatible. The GS78116 is available in 14 mm x 22 mm
BGA package.
Block Diagram
A
0
Address
Input
Buffer
Row
Decoder
Memory Array
A
18
CE
WE
OE
Column
Decoder
Control
I/O Buffer
DQ
1
DQ
16
Rev: 1.02 9/2001
For latest documentation see http://www.gsitechnology.com.
1/11
© 1999, Giga Semiconductor, Inc.
GS78116B
512K x 16 Async SRAM in 119-Bump, 14 mm x 22 mm
Top View
1
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
NC
NC,
V
SS
NC
NC
DQ
1
DQ
2
DQ
3
DQ
4
V
DD
DQ
5
DQ
6
DQ
7
DQ
8
NC
NC
NC
NC
2
A
15
A
11
NC
V
DD
NC
V
DD
NC
V
DD
V
SS
V
DD
NC
V
DD
NC
V
DD
NC
A
7
A
3
3
A
14
A
10
V
DD
,
NC
V
SS
V
DD
V
SS
V
DD
V
SS
V
DD
V
SS
V
DD
V
SS
V
DD
V
SS
NC
A
6
A
2
4
A
16
CE
A
17
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
A
18
WE
OE
5
A
13
A
9
V
SS
,
NC
V
SS
V
DD
V
SS
V
DD
V
SS
V
DD
V
SS
V
DD
V
SS
V
DD
V
SS
NC
A
5
A
1
6
A
12
A
8
NC
V
DD
NC
V
DD
NC
V
DD
V
SS
V
DD
NC
V
DD
NC
V
DD
NC
A
4
A
0
7
NC
NC
NC
NC
DQ
16
DQ
15
DQ
14
DQ
13
V
DD
DQ
12
DQ
11
DQ
10
DQ
9
NC
NC
NC,
V
SS
NC
Note: Bumps 1B, 7T, 3C, and 5C are actually NC’s but should be wired 3C = V
DD
and 1B, 7T and 5C = V
SS
to assure compatibility
with future versions.
Rev: 1.02 9/2001
For latest documentation see http://www.gsitechnology.com.
2/11
© 1999, Giga Semiconductor, Inc.
GS78116B
Truth Table
CE
H
L
L
L
Note: X: “H” or “L”
OE
X
L
X
H
WE
X
H
L
H
DQ
1
to DQ
8
Not Selected
Read
Write
High Z
V
DD
Current
ISB1, ISB2
I
DD
Absolute Maximum Ratings
Parameter
Supply Voltage
Input Voltage
Output Voltage
Allowable power dissipation
Storage temperature
Symbol
V
DD
V
IN
V
OUT
PD
T
STG
Rating
–0.5 to +4.6
–0.5 to V
DD
+0.5
(≤ 4.6 V max.)
–0.5 to V
DD
+0.5
(≤ 4.6 V max.)
1.5
–55 to 150
Unit
V
V
V
W
o
C
Note:
Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation shall be restricted to Recommended
Operating Conditions. Exposure to higher than recommended voltages for extended periods of time could affect device reliability.
Recommended Operating Conditions
Parameter
Supply Voltage for -10/12/15
Input High Voltage
Input Low Voltage
Ambient Temperature,
Commercial Range
Ambient Temperature,
Industrial Range
Symbol
V
DD
V
IH
V
IL
T
Ac
T
Ai
Min
3.0
2.0
–0.3
0
–40
Typ
3.3
—
—
—
—
Max
3.6
V
DD
+0.3
0.8
70
85
Unit
V
V
V
o
C
o
C
Notes:
1. Input overshoot voltage should be less than V
DD
+2 V and not exceed 20 ns.
2. Input undershoot voltage should be greater than –2 V and not exceed 20 ns.
Rev: 1.02 9/2001
For latest documentation see http://www.gsitechnology.com.
3/11
© 1999, Giga Semiconductor, Inc.
GS78116B
Capacitance
Parameter
Input Capacitance
Output Capacitance
Symbol
C
IN
C
OUT
Test
Condition
V
IN
= 0 V
V
OUT
= 0 V
Max
10
7
Unit
pF
pF
Notes:
1. Tested at T
A
= 25°C, f = 1 MHz
2. These parameters are sampled and are not 100% tested.
DC I/O Pin Characteristics
Parameter
Input Leakage
Current
Output Leakage
Current
Output High Voltage
Output Low Voltage
Symbol
I
IL
I
OL
V
OH
V
OL
Test Conditions
V
IN
= 0 to V
DD
Output High Z,
V
OUT
= 0 to V
DD
I
OH
= –4 mA
I
OL
= +4 mA
Min
–2 uA
–1 uA
2.4
Max
2 uA
1 uA
0.4 V
Power Supply Currents
Parameter
Symbol
Test Conditions
E
≤
V
IL
All other inputs
≥
V
IH
or
≤
V
IL
Min. cycle time
I
OUT
= 0 mA
E
≥
V
IH
All other inputs
≥
V
IH
or
≤V
IL
Min. cycle time
E
≥
V
DD
– 0.2V
All other inputs
≥
V
DD
– 0.2 V or
≤
0.2 V
0 to 70°C
10 ns
12 ns
15 ns
10 ns
–40 to 85°C
12 ns
15 ns
Operating
Supply
Current
I
DD
225 mA
220 mA
180 mA
270 mA
240 mA
200 mA
Standby
Current
I
SB1
130 mA
120 mA
110 mA
150 mA
140 mA
130 mA
Standby
Current
I
SB2
60 mA
80 mA
Rev: 1.02 9/2001
For latest documentation see http://www.gsitechnology.com.
4/11
© 1999, Giga Semiconductor, Inc.
GS78116B
AC Test Conditions
Parameter
Input high level
Input low level
Input rise time
Input fall time
Input reference level
Output reference level
Output load
Conditions
V
IH
= 2.4 V
V
IL
= 0.4 V
tr = 1 V/ns
tf = 1 V/ns
1.4 V
1.4 V
Fig. 1& 2
Output Load 1
DQ
50Ω
VT = 1.4 V
30pF
1
Output Load 2
3.3 V
DQ
5pF
1
589Ω
434Ω
Notes:
1. Include scope and jig capacitance.
2. Test conditions as specified with output loading as shown in
Fig. 1
unless otherwise noted
3. Output load 2 for t
LZ
, t
HZ
, t
OLZ
and t
OHZ
.
AC Characteristics
Read Cycle
Parameter
Read cycle time
Address access time
Chip enable access time (CE)
Output enable to output valid (OE)
Output hold from address change
Chip enable to output in low Z (CE)
Output enable to output in low Z (OE)
Chip disable to output in High Z (CE)
Output disable to output in High Z (OE)
Symbol
t
RC
t
AA
t
AC
t
OE
t
OH
t
LZ*
t
OLZ*
t
HZ*
t
OHZ*
-10
Min
10
—
—
—
3
3
0
—
—
-12
Min
12
—
—
—
3
3
0
—
—
-15
Min
15
—
—
—
3
3
0
—
—
Max
—
10
10
4
—
—
—
5
4
Max
—
12
12
5
—
—
—
6
5
Max
—
15
15
6
—
—
—
7
6
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
Rev: 1.02 9/2001
For latest documentation see http://www.gsitechnology.com.
5/11
© 1999, Giga Semiconductor, Inc.
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