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935242070112

Description
J-K Flip-Flop, HC/UH Series, 2-Func, Negative Edge Triggered, 1-Bit, Complementary Output, CMOS, PDSO14
Categorylogic    logic   
File Size50KB,7 Pages
ManufacturerNexperia
Websitehttps://www.nexperia.com
Environmental Compliance
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935242070112 Overview

J-K Flip-Flop, HC/UH Series, 2-Func, Negative Edge Triggered, 1-Bit, Complementary Output, CMOS, PDSO14

935242070112 Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerNexperia
package instructionPLASTIC, TSSOP-14
Reach Compliance Codecompliant
seriesHC/UH
JESD-30 codeR-PDSO-G14
JESD-609 codee4
length5 mm
Logic integrated circuit typeJ-K FLIP-FLOP
Humidity sensitivity level1
Number of digits1
Number of functions2
Number of terminals14
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
Output polarityCOMPLEMENTARY
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)260
propagation delay (tpd)240 ns
Certification statusNot Qualified
Maximum seat height1.1 mm
Maximum supply voltage (Vsup)6 V
Minimum supply voltage (Vsup)2 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelAUTOMOTIVE
Terminal surfaceNickel/Palladium/Gold (Ni/Pd/Au)
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
Trigger typeNEGATIVE EDGE
width4.4 mm
minfmax24 MHz

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