USBULC6-3F3
3-line low capacitance protection for high speed USB
Datasheet
−
production data
Features
■
■
■
■
■
■
Ultra low capacitance 0.85 pF
Unidirectional device
Low clamping factor V
CL
/V
BR
Fast response time
Very thin package: 0.605 mm max
Low leakage current
Benefits
■
■
■
High ESD and EOS protection level
High integration
Suitable for high density boards
Figure 1.
Flip Chip
(4 bumps)
Complies with the following standards:
■
■
Pin configuration (bump side)
IEC 61000-4-2 level 4
MIL STD 883G - Method 3015.7: class 3B
A
1
Data
Data
B
Data
Data
Application
High speed USB port in wireless handsets (up to
480 Mb/s according to USB 2.0 high speed
specification)
2
GND
GND
ID
ID
Description
The USBULC6-3F3 is a monolithic, application
specific discrete device dedicated to ESD
protection of high speed interfaces.
Its ultralow line capacitance secures a high level
of signal integrity without compromising the
protection of downstream sensitive chips against
the most stringently characterized ESD strikes.
March 2012
This is information on a product in full production.
Doc ID 17596 Rev 2
1/10
www.st.com
10
Characteristics
USBULC6-3F3
1
Characteristics
Table 1.
Symbol
V
PP
P
PP
I
PP
T
j
T
op
T
stg
Absolute maximum ratings (T
amb
= 25 °C)
Parameter
ESD discharge IEC 61000-4-2, level 4 contact discharge
Peak pulse power dissipation (8/20 µs)
Peak pulse current (8/20 µs)
Maximum junction temperature
Operating temperature range
Storage temperature range
T
j
initial = T
amb
Value
8
50
2.5
125
-30 to + 85
-55 to +150
Unit
kV
W
A
°C
°C
°C
Figure 2.
Electrical characteristics (definitions)
I
I
F
Symbol
V
BR
=
I
RM
=
V
RM
=
C
I/O to GND
=
Parameter
Breakdown voltage
Leakage current @ V
RM
Stand-off voltage
I/O to GND capacitance
V
CL
V
BR
V
RM
I
RM
V
F
V
Slope = 1/Rd
I
PP
Table 2.
Symbol
V
BR
I
RM
Electrical characteristics (T
amb
= 25 °C)
Test conditions
I
R
= 1 mA
V
RM
= 3 V
Data (A1 and B1 bumps): V
R
= 0 V DC,
F=1 MHz, V
OSC
= 30 mV
ID (B2 bump): V
R
= 0 V DC, F = 1 MHz,
V
OSC
= 30 mV
RMS
Min.
6
-
-
-
Typ.
-
-
0.85
-
Max.
-
100
1.2
pF
3
Unit
V
nA
C
I/O to GND
2/10
Doc ID 17596 Rev 2
USBULC6-3F3
Characteristics
Figure 3.
Relative variation of peak pulse
power versus initial junction
temperature (typical value)
Figure 4.
Peak pulse power versus
exponential pulse duration (typical)
60
50
40
30
20
10
0
P
PP
(W)
1000
P
PP
(W)
100
10
T
j
(°C)
1
0
25
50
75
100
125
150
175
10
100
T
P
(µs)
1000
Figure 5.
Clamping voltage versus peak
pulse current (typical values,
exponential waveform)
Figure 6.
Forward voltage drop versus peak
forward current (typical values)
10.0
I
PP
(A)
T
j
initial = 25 °C
8/20 µs
I (A)
10.00
FM
1.0
1.00
0.1
0
10
20
V
CL
(V)
0.10
V
FM
(V)
0.5 0.8 1.0 1.3 1.5 1.8 2.0 2.3 2.5 2.8 3.0 3.3 3.5 3.8 4.0
30
Figure 7.
Junction capacitance versus
reverse voltage applied
(typical values)
F = 1 MHz
V
OSC
= 30 mV
RMS
V
r
= 0 V
T
j
= 25 °C
Figure 8.
Junction capacitance versus
frequency (typical values)
2.0
C(pF)
1.00
C(pF)
F = 20 MHz –3 GHz
Vosc = 30 mV
RMS
V
r
= 0 V
T
j
= 25 °C
A1/A2
B1/A2
1.5
0.75
1.0
0.50
0.5
0.25
0.0
0
1
2
3
4
VR
(V)
V
LINE
(V)
5
0.00
0
250
F(MHz)
500 750 1000 1250 1500 1750 2000 2250 2500 2750 3000
Doc ID 17596 Rev 2
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Characteristics
USBULC6-3F3
Figure 9.
100.00
Leakage current versus junction
temperature (typical values)
Figure 10. S21 (dB) attenuation
0
dB
Ir(nA)
V
R
= V
RM
= 3 V
-1
1.00
-2
-3
0.01
25
50
75
100
T
j
(°C)
125
-4
300k
1M
3M
10M 30M 100M 300M
1G
F(Hz)
3G
Figure 11. ESD response to IEC 61000-4-2
(+8 kV contact discharge)
20 V/div
Figure 12. ESD response to IEC 61000-4-2
(-8 kV contact discharge)
C2
20 V/div
20 ns/div
C2
20 ns/div
Figure 13. Eye diagram PCB only, 400 mV
amplitude, F = 480 Mbps
Figure 14. Eye diagram PCB + USBULC6-3F3
400 mV amplitude, F = 480 Mbps
100 m/div
100 m/div
348 ps/div
348 ps/div
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Doc ID 17596 Rev 2
USBULC6-3F3
Application schematic example
2
Application schematic example
Figure 15. Schematic example
V BUS
U SB co n n e ctor
D-
D+
ID
GND
Data
Data
ID
GND
Doc ID 17596 Rev 2
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Analogue and Mixed Signal
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