®
®
A SUBSIDIARY OF C&D TECHNOLOGIES
LSN-10A D5 Models
Single Output
Non-Isolated, 5V
IN
, 1-3.8V
OUT
10 Amp DC/DC’s in SIP Packages
Features
■
■
■
■
■
Industry-standard SIP pinout
Shorter (2.0" vs. 2.5") package length
4.5-5.5V input range
1/1.2/1.5/1.8/2/2.5/3.3/3.8V
OUT
@ 10A
Non-isolated, fully synchronous,
300kHz, buck topology
Outstanding performance:
•
±1% setpoint accuracy
•
Efficiencies to 95% @ 10 Amps
•
Noise as low as 10mVp-p
•
Stable no-load operation
•♥
Trimmable output voltage
Remote on/off and sense pins
Thermal shutdown
No derating to +71°C, natural convection
UL/IEC/EN60950 certified
EMC compliant
■
■
■
■
■
■
DATEL’s new LSN D5 Series SIP’s (single-in-line packages) are non-isolated
DC/DC converters that accept a 5V input (4.5V to 5.5V input range) and deliver
1V, 1.2V, 1.5V, 1.8V, 2V, 2.5, 3.3 or 3.8V outputs at 10 Amps. LSN D5 SIP’s take on-
board 5V power and convert it, with the highest efficiency in the smallest space, to
any lower voltage required by today’s current-hungry DSP’s, ASIC’s and CPLD’s.
The miniature size of LSN D5's makes them ideal for true point-of-use power pro-
cessing. Vertical-mount packages occupy a mere 0.7 square inches (440 sq. mm),
and they are available in industry-standard and Tyco-compatible pinout. Horizontal-
mount packages ("H" suffix) are only 0.34 inches (8.6mm) high.
The LSN's best-in-class power density is achieved with a fully synchronous,
fixed-frequency (300kHz), buck topology that also delivers: high efficiency (to 95%),
low noise (10mVp-p typ.), tight line/load regulation (±0.1%/±0.25% max.), quick step
response (100µsec), stable no-load operation, and no output reverse conduction.
The fully functional LSN’s feature output overcurrent detection, continuous
short-circuit protection, an output-voltage trim function, a remote on/off control pin
(pull high to disable), thermal shutdown, and a sense pin. High efficiency enables
the LSN D5's to deliver rated output currents of 10 Amps at ambient temperatures to
+71°C with no air flow (natural convection).
If your low-voltage, high-current requirements have made the use of inefficient
linear regulators impractical, take a look at one of DATEL’s easy-to-use, low-cost
LSN SIP’s. All devices are UL/IEC/EN60950 certified and EMC compliant. UL, CB,
HALT and EMC reports are available upon request.
+INPUT
(7,8)
10.5Ω
220µF
44µF
+OUTPUT
(1,2,4)
47.1µF
(100.1µF)
470µF
(330µF)
+SENSE
➀
(3)
COMMON
(5)
➁
COMMON
(6)
CURRENT
SENSE
➁
V
CC
ON/OFF
CONTROL
(11)
PWM
CONTROLLER
REFERENCE &
ERROR AMP
TRIM
(10)
Figure 1. Simplified Schematic
➀
For devices with the sense-pin removed ("B" suffix), the feedback path is
through the +Output pin and not the +Sense pin.
➁
Values in parenthesis for 3.3V models only.
DATEL, Inc., Mansfield, MA 02048 (USA) · Tel: (508)339-3000, (800)233-2765 Fax: (508)339-6356 · Email: sales@datel.com · Internet: www.datel.com
LSN-10A D5 Series
Performance Specifications and Ordering Guide
Output
Model
LSN-1/10-D5
LSN-1.2/10-D5
LSN-1.5/10-D5
LSN-1.8/10-D5
LSN-2/10-D5
LSN-2.5/10-D5
LSN-3.3/10-D5
LSN-3.8/10-D5
N O N - I S O L AT E D , 1 0 - 3 3 W S I P D C / D C C O N V E R T E R S
➀
Input
Regulation (Max.)
➂
Line
Load
±0.1%
±0.1%
±0.1%
±0.1%
±0.1%
±0.1%
±0.1%
±0.1%
±0.25%
±0.25%
±0.25%
±0.25%
±0.25%
±0.25%
±0.25%
±0.25%
V
OUT
(Volts)
1
1.2
1.5
1.8
2
2.5
3.3
3.8
I
OUT
(Amps)
10
10
10
10
10
10
10
10
R/N (mVp-p)
➁
Typ.
Max.
10
10
10
10
10
10
10
10
35
35
35
35
35
35
35
35
V
IN
Nom.
(Volts)
5
5
5
5
5
5
5
5
Range
(Volts)
4.5-5.5
4.5-5.5
4.5-5.5
4.5-5.5
4.5-5.5
4.5-5.5
4.5-5.5
4.5-5.5
I
IN
➃
(mA/A)
50/2.43
50/2.85
50/3.48
50/4.09
50/4.51
50/5.50
50/7.25
50/8.0
Efficiency
Full Load
½ Load
Min.
83%
85%
87%
89%
89.5%
91%
92%
92%
Typ.
86%
88%
90%
91.5%
92.5%
94%
95%
95%
Typ.
89%
91%
92%
93.5%
94%
95.5%
96%
96%
Package
(Case,
Pinout)
B7/B7x, P59
B7/B7x, P59
B7/B7x, P59
B7/B7x, P59
B7/B7x, P59
B7/B7x, P59
B7/B7x, P59
B7/B7x, P59
➀
Typical at T
A
= +25°C under nominal line voltage and full-load conditions, unless otherwise
noted. All models are tested and specified with external 22µF input and output capacitors.
These capacitors are necessary to accommodate our test equipment and may not be required
to achieve specified performance in your applications. See I/O Filtering and Noise Reduction.
➁
Ripple/Noise (R/N) is tested/specified over a 20MHz bandwidth and may be
reduced with external filtering. See I/O Filtering and Noise Reduction for details.
➂
These devices have no minimum-load requirements and will regulate under no-load conditions.
Regulation specifications describe the output-voltage deviation as the line voltage or load is
varied from its nominal/midpoint value to either extreme.
➃
Nominal line voltage, no-load/full-load conditions.
P A R T
N U M B E R
S T R U C T U R E
M E C H A N I C A L
S P E C I F I C A T I O N S
0.34
(8.64)
0.20
(5.08)
0.50
(12.7)
L SN
-
1.8
/
10
-
D5 B H J
Output
Configuration:
L
= Unipolar
Low Voltage
Non-Isolated SIP
Nominal Output Voltage:
1, 1.2, 1.5, 1.8, 2, 2.5, 3.3, or 3.8V
Maximum Rated Output
Current in Amps
See page 11 for
Part Number Structure
and ordering details.
2.00
(50.80)
J Suffix:
Reversed Pin
Vertical Mount
H Suffix:
Horizontal Mount
B Suffix:
No Remote Sense
(Pin 3 removed)
Input Voltage Range:
D5
= 4.5 to 5.5 Volts
(5V nominal)
0.17
(4.32)
1 2 3 4 5
6 7 8 9 10 11
0.030 ±0.001 DIA.
(0.762 ±0.025)
0.05
(1.27)
0.110
(2.79)
0.046
(1.17)
0.400
(10.16)
4 EQ. SP. @
0.100 (2.54)
1.000
(25.40)
0.500
(12.70)
5 EQ. SP. @
0.100 (2.54)
LAYOUT PATTERN
TOP VIEW
0.34
(8.64)
0.25
(6.35)
0.35
(8.89)
0.21
(5.33)
Case B7
Vertical Mounting
(Standard)
2.00
(50.80)
2.00
(50.80)
0.36
(9.14)
0.20
(5.08)
0.05
(1.27)
1 2 3 4 5
6 7 8 9 10 11
0.50
(12.7)
ISOLATING
PAD
0.17
(4.32)
1 2 3 4 5
6 7 8 9 10 11
0.50
(12.7)
0.030 ±0.001 DIA.
(0.762 ±0.025)
0.05
(1.27)
0.16
(4.06)
0.360
(9.14)
0.400
(10.16)
4 EQ. SP. @
0.100 (2.54)
0.56
(14.22)
1.000
(25.40)
0.500
(12.70)
5 EQ. SP. @
0.100 (2.54)
0.030 ±0.001 DIA.
(0.762 ±0.025)
0.05
(1.27)
0.046
(1.17)
0.106
(2.69)
0.53
(13.46)
0.400
(10.16)
4 EQ. SP. @
0.100 (2.54)
1.000
(25.40)
0.500
(12.70)
5 EQ. SP. @
0.100 (2.54)
0.36
(9.14)
Case B7A
Horizontal Mounting
0.50
(12.7)
0.306
(7.8)
LAYOUT PATTERN
TOP VIEW
0.45
(11.43)
Case B7B
Reverse Pin
Vertical Mounting
(Tyco-compatible)
RECOMMENDED
COPPER PAD
ON PCB (0.55 SQ. IN.)
LAYOUT PATTERN
TOP VIEW
Pin
1
2
3
4
Function P59*
+Output
+Output
+Sense *
+Output
I/O Connections
Pin
Function P59*
5
Common
6
Common
7
+Input
8
+Input
Pin
9
10
11
Function P59*
No Pin
V
OUT
Trim
On/Off Control
* Pin 3 (+Sense) removed
for "B" suffix models.
2
N O N - I S O L AT E D , 1 0 - 3 3 W S I P D C / D C C O N V E R T E R S
LSN-10A D5 Models
Performance/Functional Specifications
Typical @ T
A
= +25°C under nominal line voltage and full-load conditions unless noted.
➀
Absolute Maximum Ratings
Input Voltage:
Continuous or transient
On/Off Control
(Pin 11)
Input Reverse-Polarity Protection
Output Overvoltage Protection
Output Current
7 Volts
+V
IN
None
None
Current limited. Devices can
withstand sustained output short
circuits without damage.
–40 to +125°C
+300°C
Input
Input Voltage Range
Input Current:
Normal Operating Conditions
Inrush Transient
Standby/Off Mode
Output Short-Circuit Condition
➁
Input Reflected Ripple Current
➁
Input Filter Type
Overvoltage Protection
Reverse-Polarity Protection
Undervoltage Shutdown
On/Off Control
➁ ➂
4.5 to 5.5 Volts (5V nominal)
See Ordering Guide
0.014A
2
sec
3mA
70mA average
50mAp-p
Capacitive (264µF)
None
None
None
On = open (internal pulldown)
Off = +2.8V to +V
IN
(<3mA)
Storage Temperature
Lead Temperature
(soldering, 10 sec.)
These are stress ratings. Exposure of devices to any of these conditions may adversely
affect long-term reliability. Proper operation under conditions other than those listed in the
Performance/Functional Specifications Table is not implied.
Output
V
OUT
Accuracy
(50% load)
Minimum Loading
➀
Maximum Capacitive Load
V
OUT
Trim Range
➁
Ripple/Noise
(20MHz BW)
➀ ➁ ➃
Total Accurcacy
Efficiency
➁
±1% maximum
No load
10,000µF (electrolytic)
±10%
See Ordering Guide
3% over line/load/temperature
See Ordering Guide
T E C H N I C A L
N O T E S
Return Current Paths
The LSN D5 SIP’s are non-isolated DC/DC converters. Their two Common
pins (pins 5 and 6) are connected to each other internally (see Figure 1). To
the extent possible (with the intent of minimizing ground loops), input return
current should be directed through pin 6 (also referred to as –Input or
Input Return), and output return current should be directed through pin 5
(also referred to as –Output or Output Return). Any on/off control signals
applied to pin 11 (On/Off Control) should be referenced to Common
(specifically pin 6).
I/O Filtering and Noise Reduction
All models in the LSN D5 Series are tested and specified with external 22µF
input and output capacitors. These capacitors are necessary to accommodate
our test equipment and may not be required to achieved desired performance
in your application. The LSN D5's are designed with high-quality, high-
performance
internal
I/O caps, and will operate within spec in most applica-
tions with
no additional external components.
In particular, the LSN D5's input capacitors are specified for low ESR
and are fully rated to handle the units' input ripple currents. Similarly, the
internal output capacitors are specified for low ESR and full-range frequency
response. As shown in the Performance Curves, removal of the external
output caps has minimal effect on output noise.
In critical applications, input/output ripple/noise may be further reduced using
filtering techniques, the simplest being the installation of external I/O caps.
External input capacitors serve primarily as energy-storage devices. They
minimize high-frequency variations in input voltage (usually caused by IR
drops in conductors leading to the DC/DC) as the switching converter draws
pulses of current. Input capacitors should be selected for bulk capacitance (at
appropriate frequencies), low ESR, and high rms-ripple-current ratings. The
switching nature of modern DC/DC's requires that the dc input voltage
source have low ac impedance at the frequencies of interest. Highly inductive
source impedances can greatly affect system stability. Your specific system
configuration may necessitate additional considerations.
Output ripple/noise (also referred to as periodic and random deviations
or PARD) may be reduced below specified limits with the installation of
additional external output capacitors. Output capacitors function as true filter
Overcurrent Detection and Short-Circuit Protection:
➁
Current-Limiting Detection Point
17 (12.5-22) Amps
Short-Circuit Detection Point
98% of V
OUT
set
SC Protection Technique
Hiccup with auto recovery
Short-Circuit Current
400mA average
Dynamic Characteristics
Transient Response
(50% load step)
Start-Up Time:
➁
V
IN
to V
OUT
On/Off to V
OUT
Switching Frequency
50µsec to ±2% of final value
7msec
6msec
300kHz (+40kHz, –50kHz)
Environmental
MTBF:
Bellcore, ground fixed, T
A
= +25°C,
full power, natural convection,
+55°C component temperature
2.1 million hours
Operating Temperature:
(Ambient)
➁
Without Derating (Natural convection)
With Derating
Thermal Shutdown
Dimensions
Package
Pin Dimensions/Material
Weight
Flamability Rating
–40 to +63/71°C (model dependent)
See Derating Curves
+115°C
Physical
See Mechanical Specifications
Open-frame, single-in-line (SIP)
0.03" (0.76mm) round copper with
tin-lead plate over nickel underplate
0.3 ounces (8.5g)
UL94V-0
➀
All models are tested and specified with external 22µF input and output capacitors.These
capacitors are necessary to accommodate our test equipment and may not be required
to achieve specified performance in your applications. All models are stable and regulate
within spec under no-load conditions.
➁
See Technical Notes and Performance Curves for details.
➂
The On/Off Control (pin 11) is designed to be driven with open-collector logic or the appli-
cation of appropriate voltages (referenced to Common, pins 5 and 6).
➃
Output noise may be further reduced with the installation of additional external output
filtering. See I/O Filtering and Noise Reduction.
3
LSN-10A D5 Series
N O N - I S O L AT E D , 1 0 - 3 3 W S I P D C / D C C O N V E R T E R S
elements and should be selected for bulk capacitance, low ESR, and appro-
priate frequency response. Any scope measurements of PARD should be
made directly at the DC/DC output pins with scope probe ground less than
0.5" in length.
All external capacitors should have appropriate voltage ratings and be located
as close to the converters as possible. Temperature variations for all relevant
parameters should be taken into consideration.
The most effective combination of external I/O capacitors will be a function
of your line voltage and source impedance, as well as your particular load and
layout conditions. Our Applications Engineers can recommend potential solu-
tions and discuss the possibility of our modifying a given device’s internal filter-
ing to meet your specific requirements. Contact our Applications Engineering
Group for additional details.
Input Fusing
Most applications and or safety agencies require the installation of fuses at
the inputs of power conversion components. LSN D5 Series DC/DC convert-
ers are not internally fused. Therefore, if input fusing is mandatory, either a
normal-blow or a slow-blow fuse with a value no greater than 15 Amps should
be installed within the ungrounded input path to the converter.
As a rule of thumb however, we recommend to use a normal-blow or slow-
blow fuse with a typical value of about twice the maximum input current,
calculated at low line with the converters minimum efficiency.
Safety Considerations
LSN D5 SIP's are non-isolated DC/DC converters. In general, all DC/DC's
must be installed, including considerations for I/O voltages and spacing/
separation requirements, in compliance with relevant safety-agency speci-
fications (usually UL/IEC/EN60950).
In particular, for a non-isolated converter's output voltage to meet SELV
(safety extra low voltage) requirements, its input must be SELV compliant.
If the output needs to be ELV (extra low voltage), the input must be ELV.
Input Overvoltage and Reverse-Polarity Protection
LSN D5 SIP Series DC/DC's do not incorporate either input overvoltage or
input reverse-polarity protection. Input voltages in excess of the specified
absolute maximum ratings and input polarity reversals of longer than "instan-
taneous" duration can cause permanent damage to these devices.
Start-Up Time
The V
IN
to V
OUT
Start-Up Time is the interval between the time at which a
ramping input voltage crosses the lower limit of the specified input voltage
range (4.5 Volts) and the fully loaded output voltage enters and remains within
its specified accuracy band. Actual measured times will vary with input source
impedance, external input capacitance, and the slew rate and final value of
the input voltage as it appears to the converter.
The On/Off to V
OUT
Start-Up Time assumes the converter is turned off via the
On/Off Control with the nominal input voltage already applied to the converter.
The specification defines the interval between the time at which the converter
is turned on and the fully loaded output voltage enters and remains within its
specified accuracy band. See Typical Performance Curves.
Remote Sense
LSN D5 SIP Series DC/DC converters offer an output sense function on pin 3.
The sense function enables point-of-use regulation for overcoming moderate
IR drops in conductors and/or cabling. Since these are non-isolated devices
whose inputs and outputs usually share the same ground plane, sense is
provided only for the +Output.
The remote sense line is part of the feedback control loop regulating the
DC/DC converter’s output. The sense line carries very little current and
consequently requires a minimal cross-sectional-area conductor. As such, it
is not a low-impedance point and must be treated with care in layout
and cabling. Sense lines should be run adjacent to signals (preferably
ground), and in cable and/or discrete-wiring applications, twisted-pair or
similar techniques should be used. To prevent high frequency voltage differ-
ences between V
OUT
and Sense, we recommend installation of a 1000pF
capacitor close to the converter.
The sense function is capable of compensating for voltage drops between the
+Output and +Sense pins that do not exceed 10% of V
OUT
.
[V
OUT
(+) – Common] – [Sense(+) – Common]
≤
10%V
OUT
Power derating (output current limiting) is based upon maximum output
current and voltage at the converter's output pins. Use of trim and sense
functions can cause the output voltage to increase, thereby increasing output
power beyond the LSN's specified rating. Therefore:
(V
OUT
at pins) x (I
OUT
)
≤
rated output power
The internal 10.5Ω resistor between +Sense and +Output (see Figure 1)
serves to protect the sense function by limiting the output current flowing
through the sense line if the main output is disconnected. It also prevents
output voltage runaway if the sense connection is disconnected.
Note: Connect the +Sense pin (pin 3) to +Output (pin 4) at the DC/DC
converter pins, if the sense function is not used for remote regulation.
On/Off Control and Power-up Sequencing
The On/Off Control pin may be used for remote on/off operation. LSN D5 SIP
Series DC/DC's are designed so they are enabled when the control pin is
left open (internal pull-down to Common) and disabled when the control pin is
pulled high (+2.8V to +V
IN
), as shown in Figure 2 and 2a.
Dynamic control of the on/off function is best accomplished with a mechanical
relay or open-collector/open-drain drive circuit. The drive circuit should be
able to sink appropriate current when activated and withstand appropriate
voltage when deactivated.
+INPUT
5kΩ
1.1kΩ
ON/OFF
CONTROL
0.75kΩ
COMMON
Figure 2. Driving the On/Off Control Pin with an Open-Collector Drive Circuit
The on/off control function, however, can be externally inverted so that the
converter will be disabled while the input voltage is ramping up and then
"released" once the input has stabilized.
4
N O N - I S O L AT E D , 1 0 - 3 3 W S I P D C / D C C O N V E R T E R S
LSN-10A D5 Models
+INPUT
½½½½½½½
5kΩ
2kΩ
1.1kΩ
½½½½½½
½½½½
½½½½½½
½½½½ ½
½½½½
½½½½
½½½½½ ½
½½
ON/OFF
CONTROL
0.75kΩ
½½½½½½
COMMON
Figure 3. Trim Connections Using a Trimpot
Figure 2a. Inverting On/Off Control Pin Signal and Power-Up Sequencing
+OUTPUT
+INPUT
TRIM
COMMON
COMMON
Trim Up
Trim
Down
For a controlled start-up of one or more LSN-D5's, or if several output volt-
ages need to be powered-up in a given sequence, the On/Off Control pin can
be pulled high (external pull-up resistor, converter disabled) and then driven
low with an external open collector device to enable the converter.
Output Overvoltage Protection
LSN D5 SIP Series DC/DC converters do not incorporate output overvoltage
protection. In the extremely rare situation in which the device’s feedback loop
is broken, the output voltage may run to excessively high levels (V
OUT
= V
IN
).
If it is absolutely imperative that you protect your load against any and all
possible overvoltage situations, voltage limiting circuitry must be provided
external to the power converter.
Output Overcurrent Detection
Overloading the output of a power converter for an extended period of
time will invariably cause internal component temperatures to exceed their
maximum ratings and eventually lead to component failure. High-current-
carrying components such as inductors, FET's and diodes are at the highest
risk. LSN D5 SIP Series DC/DC converters incorporate an output overcurrent
detection and shutdown function that serves to protect both the power
converter and its load.
If the output current exceeds it maximum rating by typically 70% (17 Amps) or
if the output voltage drops to less than 98% of it original value, the LSN D5's
internal overcurrent-detection circuitry immediately turns off the converter,
which then goes into a "hiccup" mode. While hiccupping, the converter will
continuously attempt to restart itself, go into overcurrent, and then shut down.
Under these conditions, the average output current will be approximately
400mA, and the average input current will be approximately 70mA. Once the
output short is removed, the converter will automatically restart itself.
Output Voltage Trimming
Allowable trim ranges for each model in the LSN D5 SIP Series are ±10%.
Trimming is accomplished with either a trimpot or a single fixed resistor. The
trimpot should be connected between +Output and Common with its wiper
connected to the Trim pin as shown in Figure 3 below.
A trimpot can be used to determine the value of a single fixed resistor
which can then be connected, as shown in Figure 4, between the Trim pin
and +Output to trim down the output voltage, or between the Trim pin and
Common to trim up the output voltage. Fixed resistors should have absolute
TCR’s less than 100ppm/°C to ensure stability.
The equations below can be used as starting points for selecting specific trim-
resistor values. Recall, untrimmed devices are guaranteed to be
±1%
accurate.
Adjustment beyond the specified ±10% adjustment range is not recommended.
LOAD
Note:
Install either a fixed trim-up resistor or a fixed trim-down resistor
depending upon desired output voltage.
Figure 4. Trim Connections Using Fixed Resistors
Model
Trim Equations
R
T
DOWN
(kΩ) =
1.62(V
O
0.8)
1
–
V
O
1.296
V
O
–
1
–
1
LSN-1/10-D5
R
T
UP
(kΩ) =
–
1
R
T
DOWN
(kΩ) =
2.49(V
O
0.8)
1.2
–
V
O
1.992
V
O
–
1.2
–
2.37
LSN-1.2/10-D5
R
T
UP
(kΩ) =
–
2.37
LSN-1.5/10-D5
LSN-1.8/10-D5
LSN-2/10-D5
LSN-2.5/10-D5
R
T
DOWN
(kΩ) =
2.37(V
O
–
0.8)
V
O NOM
–
V
O
1.896
V
O
–
V
O NOM
7.5(V
O
–
0.8)
V
O NOM
–
V
O
–
4.99
R
T
UP
(kΩ) =
–
4.99
R
T
DOWN
(kΩ) =
–
4.99
LSN-3.3/10-D5
R
T
UP
(kΩ) =
6
–
4.99
V
O
–
V
O NOM
Note: Resistor values are in kΩ. Accuracy of adjustment is subject to
tolerances of resistors and factory-adjusted, initial output accuracy.
V
O
= desired output voltage. V
ONOM
= nominal output voltage.
Output Reverse Conduction
Many DC/DC converters using synchronous rectification suffer from Output
Reverse Conduction. If those devices have a voltage applied across their
output before a voltage is applied to their input (this typically occurs when
another power supply starts before them in a power-sequenced application),
5
FPGA/CPLD
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