Small Signal Transistor
PROCESS
CP714
PNP - High Current Transistor Chip
PROCESS DETAILS
Process
Die Size
Die Thickness
Base Bonding Pad Area
Emitter Bonding Pad Area
Top Side Metalization
Back Side Metalization
GEOMETRY
GROSS DIE PER 4 INCH WAFER
7,070
PRINCIPAL DEVICE TYPES
CBCP69
CBCX69
CZT751
MPS750
MPS751
EPITAXIAL PLANAR
40 x 40 MILS
9.0 MILS
7.9 x 8.7 MILS
9.0 x 14 MILS
Al - 30,000Å
Au - 18,000Å
BACKSIDE COLLECTOR
145 Adams Avenue
Hauppauge, NY 11788 USA
Tel: (631) 435-1110
Fax: (631) 435-1824
www.centralsemi.com
R3 (23-August 2006)