IS42S16100-6TL datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > storage> storage> IS42S16100-6TL

IS42S16100-6TL: DescriptionSynchronous DRAM, 1MX16, 5.5ns, CMOS, PDSO50, 0.400 INCH, LEAD FREE, TSOP2-50; Categorystorage storage; File Size1MB，81 Pages; ManufacturerIntegrated Silicon Solution ( ISSI ); Environmental Compliance

Download Datasheet Parametric Compare View All

IS42S16100-6TL Overview

Synchronous DRAM, 1MX16, 5.5ns, CMOS, PDSO50, 0.400 INCH, LEAD FREE, TSOP2-50

IS42S16100-6TL Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Integrated Silicon Solution ( ISSI )
Parts packaging code	TSOP2
package instruction	TSOP2, TSOP50,.46,32
Contacts	50
Reach Compliance Code	compliant
ECCN code	EAR99
access mode	DUAL BANK PAGE BURST
Maximum access time	5.5 ns
Other features	AUTO/SELF REFRESH
Maximum clock frequency (fCLK)	166 MHz
I/O type	COMMON
interleaved burst length	1,2,4,8
JESD-30 code	R-PDSO-G50
JESD-609 code	e3
length	20.95 mm
memory density	16777216 bit
Memory IC Type	SYNCHRONOUS DRAM
memory width	16
Humidity sensitivity level	3
Number of functions	1
Number of ports	1
Number of terminals	50
word count	1048576 words
character code	1000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	1MX16
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	TSOP2
Encapsulate equivalent code	TSOP50,.46,32
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE
Peak Reflow Temperature (Celsius)	260
power supply	3.3 V
Certification status	Not Qualified
refresh cycle	2048
Maximum seat height	1.2 mm
self refresh	YES
Continuous burst length	1,2,4,8,FP
Maximum standby current	0.002 A
Maximum slew rate	0.16 mA
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Matte Tin (Sn) - annealed
Terminal form	GULL WING
Terminal pitch	0.8 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	10
width	10.16 mm

Preview

Download Datasheet

View All

IS42S16100

512K Words x 16 Bits x 2 Banks (16-MBIT)

SYNCHRONOUS DYNAMIC RAM

FEATURES

• Clock frequency: 200, 166, 143 MHz

• Fully synchronous; all signals referenced to a

positive clock edge

• Two banks can be operated simultaneously and

independently

• Dual internal bank controlled by A11

(bank select)

• Single 3.3V power supply

• LVTTL interface

• Programmable burst length

– (1, 2, 4, 8, full page)

• Programmable burst sequence:

Sequential/Interleave

• 2048 refresh cycles every 32 ms

• Random column address every clock cycle

• Programmable

CAS

latency (2, 3 clocks)

• Burst read/write and burst read/single write

operations capability

• Burst termination by burst stop and

precharge command

• Byte controlled by LDQM and UDQM

• Packages 400-mil 50-pin TSOP-II and 60-ball

BGA

• Lead-free package option

• Available in Industrial Temperature

FEBRUARY 2008

DESCRIPTION

ISSI

’s 16Mb Synchronous DRAM IS42S16100 is

organized as a 524,288-word x 16-bit x 2-bank for

improved performance. The synchronous DRAMs

achieve high-speed data transfer using pipeline

architecture. All inputs and outputs signals refer to the

rising edge of the clock input.

PIN CONFIGURATIONS

50-Pin TSOP (Type II)

VDD

DQ0

DQ1

GNDQ

DQ2

DQ3

VDDQ

DQ4

DQ5

GNDQ

DQ6

DQ7

VDDQ

LDQM

CAS

RAS

A11

A10

VDD

GND

DQ15

IDQ14

GNDQ

DQ13

DQ12

VDDQ

DQ11

DQ10

GNDQ

DQ9

DQ8

VDDQ

UDQM

CLK

CKE

GND

PIN DESCRIPTIONS

A0-A11

A0-A10

A11

A0-A7

DQ0 to DQ15

CLK

CKE

RAS

Address Input

Row Address Input

Bank Select Address

Column Address Input

Data DQ

System Clock Input

Clock Enable

Chip Select

Row Address Strobe Command

CAS

LDQM

UDQM

VDD

GND

VDDQ

GNDQ

Column Address Strobe Command

Write Enable

Lower Bye, Input/Output Mask

Upper Bye, Input/Output Mask

Power

Ground

Power Supply for DQ Pin

Ground for DQ Pin

No Connection

notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the

latest version of this device specification before relying on any published information and before placing orders for products.

Integrated Silicon Solution, Inc. — www.issi.com

Rev. D

01/28/08

IS42S16100-6TL Related Products

	IS42S16100-6TL	IS42S16100-7TLI	IS42S16100-7TL	IS42S16100-6BL	IS42S16100-6BLI	IS42S16100-6TLI	IS42S16100-7BLI	IS42S16100-7BL
Description	Synchronous DRAM, 1MX16, 5.5ns, CMOS, PDSO50, 0.400 INCH, LEAD FREE, TSOP2-50	Synchronous DRAM, 1MX16, 5.5ns, CMOS, PDSO50, 0.400 INCH, LEAD FREE, TSOP2-50	Synchronous DRAM, 1MX16, 5.5ns, CMOS, PDSO50, 0.400 INCH, LEAD FREE, TSOP2-50	Synchronous DRAM, 1MX16, 5.5ns, CMOS, PBGA60, 10.10 MM X 6.40 MM, 0.65 MM PITCH, LEAD FREE, FBGA-60	Synchronous DRAM, 1MX16, 5.5ns, CMOS, PBGA60, 10.10 MM X 6.40 MM, 0.65 MM PITCH, LEAD FREE, FBGA-60	Synchronous DRAM, 1MX16, 5.5ns, CMOS, PDSO50, 0.400 INCH, LEAD FREE, TSOP2-50	Synchronous DRAM, 1MX16, 5.5ns, CMOS, PBGA60, 10.10 MM X 6.40 MM, 0.65 MM PITCH, LEAD FREE, FBGA-60	Synchronous DRAM, 1MX16, 5.5ns, CMOS, PBGA60, 10.10 MM X 6.40 MM, 0.65 MM PITCH, LEAD FREE, FBGA-60
Is it lead-free?	Lead free	Lead free	Lead free	Lead free	Lead free	Lead free	Lead free	Lead free
Is it Rohs certified?	conform to	conform to	conform to	conform to	conform to	conform to	conform to	conform to
Maker	Integrated Silicon Solution ( ISSI )	Integrated Silicon Solution ( ISSI )	Integrated Silicon Solution ( ISSI )	Integrated Silicon Solution ( ISSI )	Integrated Silicon Solution ( ISSI )	Integrated Silicon Solution ( ISSI )	Integrated Silicon Solution ( ISSI )	Integrated Silicon Solution ( ISSI )
Parts packaging code	TSOP2	TSOP2	TSOP2	BGA	BGA	TSOP2	BGA	BGA
package instruction	TSOP2, TSOP50,.46,32	TSOP2, TSOP50,.46,32	TSOP2, TSOP50,.46,32	TFBGA, BGA60,7X15,25	TFBGA, BGA60,7X15,25	TSOP2, TSOP50,.46,32	TFBGA, BGA60,7X15,25	TFBGA, BGA60,7X15,25
Contacts	50	50	50	60	60	50	60	60
Reach Compliance Code	compliant	compliant	compliant	compliant	compliant	compliant	compliant	compliant
ECCN code	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99
access mode	DUAL BANK PAGE BURST	DUAL BANK PAGE BURST	DUAL BANK PAGE BURST	DUAL BANK PAGE BURST	DUAL BANK PAGE BURST	DUAL BANK PAGE BURST	DUAL BANK PAGE BURST	DUAL BANK PAGE BURST
Maximum access time	5.5 ns	5.5 ns	5.5 ns	5.5 ns	5.5 ns	5.5 ns	5.5 ns	5.5 ns
Other features	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH
Maximum clock frequency (fCLK)	166 MHz	143 MHz	143 MHz	166 MHz	166 MHz	166 MHz	143 MHz	143 MHz
I/O type	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON
interleaved burst length	1,2,4,8	1,2,4,8	1,2,4,8	1,2,4,8	1,2,4,8	1,2,4,8	1,2,4,8	1,2,4,8
JESD-30 code	R-PDSO-G50	R-PDSO-G50	R-PDSO-G50	R-PBGA-B60	R-PBGA-B60	R-PDSO-G50	R-PBGA-B60	R-PBGA-B60
JESD-609 code	e3	e3	e3	e1	e1	e3	e1	e1
length	20.95 mm	20.95 mm	20.95 mm	10.1 mm	10.1 mm	20.95 mm	10.1 mm	10.1 mm
memory density	16777216 bit	16777216 bit	16777216 bit	16777216 bit	16777216 bit	16777216 bit	16777216 bit	16777216 bit
Memory IC Type	SYNCHRONOUS DRAM	SYNCHRONOUS DRAM	SYNCHRONOUS DRAM	SYNCHRONOUS DRAM	SYNCHRONOUS DRAM	SYNCHRONOUS DRAM	SYNCHRONOUS DRAM	SYNCHRONOUS DRAM
memory width	16	16	16	16	16	16	16	16
Humidity sensitivity level	3	3	3	3	3	3	3	3
Number of functions	1	1	1	1	1	1	1	1
Number of ports	1	1	1	1	1	1	1	1
Number of terminals	50	50	50	60	60	50	60	60
word count	1048576 words	1048576 words	1048576 words	1048576 words	1048576 words	1048576 words	1048576 words	1048576 words
character code	1000000	1000000	1000000	1000000	1000000	1000000	1000000	1000000
Operating mode	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS
Maximum operating temperature	70 °C	85 °C	70 °C	70 °C	85 °C	85 °C	85 °C	70 °C
organize	1MX16	1MX16	1MX16	1MX16	1MX16	1MX16	1MX16	1MX16
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	TSOP2	TSOP2	TSOP2	TFBGA	TFBGA	TSOP2	TFBGA	TFBGA
Encapsulate equivalent code	TSOP50,.46,32	TSOP50,.46,32	TSOP50,.46,32	BGA60,7X15,25	BGA60,7X15,25	TSOP50,.46,32	BGA60,7X15,25	BGA60,7X15,25
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE	SMALL OUTLINE, THIN PROFILE	SMALL OUTLINE, THIN PROFILE	GRID ARRAY, THIN PROFILE, FINE PITCH	GRID ARRAY, THIN PROFILE, FINE PITCH	SMALL OUTLINE, THIN PROFILE	GRID ARRAY, THIN PROFILE, FINE PITCH	GRID ARRAY, THIN PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)	260	260	260	260	260	260	260	260
power supply	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
refresh cycle	2048	2048	2048	2048	2048	2048	2048	2048
Maximum seat height	1.2 mm	1.2 mm	1.2 mm	1.2 mm	1.2 mm	1.2 mm	1.2 mm	1.2 mm
self refresh	YES	YES	YES	YES	YES	YES	YES	YES
Continuous burst length	1,2,4,8,FP	1,2,4,8,FP	1,2,4,8,FP	1,2,4,8,FP	1,2,4,8,FP	1,2,4,8,FP	1,2,4,8,FP	1,2,4,8,FP
Maximum standby current	0.002 A	0.004 A	0.002 A	0.002 A	0.004 A	0.004 A	0.004 A	0.002 A
Maximum slew rate	0.16 mA	0.16 mA	0.14 mA	0.16 mA	0.17 mA	0.17 mA	0.16 mA	0.14 mA
Maximum supply voltage (Vsup)	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V
Minimum supply voltage (Vsup)	3 V	3 V	3 V	3 V	3 V	3 V	3 V	3 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	INDUSTRIAL	COMMERCIAL	COMMERCIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	COMMERCIAL
Terminal surface	Matte Tin (Sn) - annealed	Matte Tin (Sn) - annealed	Matte Tin (Sn) - annealed	Tin/Silver/Copper (Sn/Ag/Cu)	Tin/Silver/Copper (Sn/Ag/Cu)	Matte Tin (Sn) - annealed	Tin/Silver/Copper (Sn/Ag/Cu)	Tin/Silver/Copper (Sn/Ag/Cu)
Terminal form	GULL WING	GULL WING	GULL WING	BALL	BALL	GULL WING	BALL	BALL
Terminal pitch	0.8 mm	0.8 mm	0.8 mm	0.65 mm	0.65 mm	0.8 mm	0.65 mm	0.65 mm
Terminal location	DUAL	DUAL	DUAL	BOTTOM	BOTTOM	DUAL	BOTTOM	BOTTOM
Maximum time at peak reflow temperature	10	10	10	10	10	10	10	10
width	10.16 mm	10.16 mm	10.16 mm	6.4 mm	6.4 mm	10.16 mm	6.4 mm	6.4 mm

Recommended Resources

Typical circuit of integrated D flip-flop

Multifunctional password controller circuit c

Silicon photodiode amplifier circuit

Typical bandpass filter circuit

IGBT drive circuit

Computer motherboard circuit diagram 820 2_14

Shortcut: L0 L1 L2 L3 L4 L5 L6 L7 L8 L9 LA LB LC LD LE LF LG LH LI LJ LK LL LM LN LO LP LQ LR LS LT LU LV LW LX LY LZ M0 M1 M2 M3 M4 M5 M6 M7 M8 M9 MA MB MC MD ME MF MG MH MI MJ MK ML MM MN MO MP MQ MR MS MT MU MV MW MX MY MZ N0 N1 N2 N3 N4 N5 N6 N7 N8 NA NB NC ND NE NF NG NH NI NJ NK NL NM NN NO NP NQ NR NS NT NU NV NX NZ O0 O1 O2 O3 OA OB OC OD OE OF OG OH OI OJ OK OL OM ON OP OQ OR OS OT OV OX OY OZ P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 PA PB PC PD PE PF PG PH PI PJ PK PL PM PN PO PP PQ PR PS PT PU PV PW PX PY PZ Q1 Q2 Q3 Q4 Q5 Q6 Q8 Q9 QA QB QC QE QF QG QH QK QL QM QP QR QS QT QV QW QX QY R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 RA RB RC RD RE RF RG RH RI RJ RK RL RM RN RO RP RQ RR RS RT RU RV RW RX RY RZ

Popular Components