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IS42S16100-7TLI

Description
Synchronous DRAM, 1MX16, 5.5ns, CMOS, PDSO50, 0.400 INCH, LEAD FREE, TSOP2-50
Categorystorage    storage   
File Size1MB,81 Pages
ManufacturerIntegrated Silicon Solution ( ISSI )
Environmental Compliance  
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IS42S16100-7TLI Overview

Synchronous DRAM, 1MX16, 5.5ns, CMOS, PDSO50, 0.400 INCH, LEAD FREE, TSOP2-50

IS42S16100-7TLI Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerIntegrated Silicon Solution ( ISSI )
Parts packaging codeTSOP2
package instructionTSOP2, TSOP50,.46,32
Contacts50
Reach Compliance Codecompliant
ECCN codeEAR99
access modeDUAL BANK PAGE BURST
Maximum access time5.5 ns
Other featuresAUTO/SELF REFRESH
Maximum clock frequency (fCLK)143 MHz
I/O typeCOMMON
interleaved burst length1,2,4,8
JESD-30 codeR-PDSO-G50
JESD-609 codee3
length20.95 mm
memory density16777216 bit
Memory IC TypeSYNCHRONOUS DRAM
memory width16
Humidity sensitivity level3
Number of functions1
Number of ports1
Number of terminals50
word count1048576 words
character code1000000
Operating modeSYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize1MX16
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeTSOP2
Encapsulate equivalent codeTSOP50,.46,32
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE
Peak Reflow Temperature (Celsius)260
power supply3.3 V
Certification statusNot Qualified
refresh cycle2048
Maximum seat height1.2 mm
self refreshYES
Continuous burst length1,2,4,8,FP
Maximum standby current0.004 A
Maximum slew rate0.16 mA
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceMatte Tin (Sn) - annealed
Terminal formGULL WING
Terminal pitch0.8 mm
Terminal locationDUAL
Maximum time at peak reflow temperature10
width10.16 mm
IS42S16100
512K Words x 16 Bits x 2 Banks (16-MBIT)
SYNCHRONOUS DYNAMIC RAM
FEATURES
• Clock frequency: 200, 166, 143 MHz
• Fully synchronous; all signals referenced to a
positive clock edge
• Two banks can be operated simultaneously and
independently
• Dual internal bank controlled by A11
(bank select)
• Single 3.3V power supply
• LVTTL interface
• Programmable burst length
– (1, 2, 4, 8, full page)
• Programmable burst sequence:
Sequential/Interleave
• 2048 refresh cycles every 32 ms
• Random column address every clock cycle
• Programmable
CAS
latency (2, 3 clocks)
• Burst read/write and burst read/single write
operations capability
• Burst termination by burst stop and
precharge command
• Byte controlled by LDQM and UDQM
• Packages 400-mil 50-pin TSOP-II and 60-ball
BGA
• Lead-free package option
• Available in Industrial Temperature
FEBRUARY 2008
DESCRIPTION
ISSI
’s 16Mb Synchronous DRAM IS42S16100 is
organized as a 524,288-word x 16-bit x 2-bank for
improved performance. The synchronous DRAMs
achieve high-speed data transfer using pipeline
architecture. All inputs and outputs signals refer to the
rising edge of the clock input.
PIN CONFIGURATIONS
50-Pin TSOP (Type II)
VDD
DQ0
DQ1
GNDQ
DQ2
DQ3
VDDQ
DQ4
DQ5
GNDQ
DQ6
DQ7
VDDQ
LDQM
WE
CAS
RAS
CS
A11
A10
A0
A1
A2
A3
VDD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
GND
DQ15
IDQ14
GNDQ
DQ13
DQ12
VDDQ
DQ11
DQ10
GNDQ
DQ9
DQ8
VDDQ
NC
UDQM
CLK
CKE
NC
A9
A8
A7
A6
A5
A4
GND
PIN DESCRIPTIONS
A0-A11
A0-A10
A11
A0-A7
DQ0 to DQ15
CLK
CKE
CS
RAS
Address Input
Row Address Input
Bank Select Address
Column Address Input
Data DQ
System Clock Input
Clock Enable
Chip Select
Row Address Strobe Command
CAS
WE
LDQM
UDQM
VDD
GND
VDDQ
GNDQ
NC
Column Address Strobe Command
Write Enable
Lower Bye, Input/Output Mask
Upper Bye, Input/Output Mask
Power
Ground
Power Supply for DQ Pin
Ground for DQ Pin
No Connection
Copyright © 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without
notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the
latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.com
Rev. D
01/28/08
1

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Description Synchronous DRAM, 1MX16, 5.5ns, CMOS, PDSO50, 0.400 INCH, LEAD FREE, TSOP2-50 Synchronous DRAM, 1MX16, 5.5ns, CMOS, PDSO50, 0.400 INCH, LEAD FREE, TSOP2-50 Synchronous DRAM, 1MX16, 5.5ns, CMOS, PBGA60, 10.10 MM X 6.40 MM, 0.65 MM PITCH, LEAD FREE, FBGA-60 Synchronous DRAM, 1MX16, 5.5ns, CMOS, PBGA60, 10.10 MM X 6.40 MM, 0.65 MM PITCH, LEAD FREE, FBGA-60 Synchronous DRAM, 1MX16, 5.5ns, CMOS, PDSO50, 0.400 INCH, LEAD FREE, TSOP2-50 Synchronous DRAM, 1MX16, 5.5ns, CMOS, PDSO50, 0.400 INCH, LEAD FREE, TSOP2-50 Synchronous DRAM, 1MX16, 5.5ns, CMOS, PBGA60, 10.10 MM X 6.40 MM, 0.65 MM PITCH, LEAD FREE, FBGA-60 Synchronous DRAM, 1MX16, 5.5ns, CMOS, PBGA60, 10.10 MM X 6.40 MM, 0.65 MM PITCH, LEAD FREE, FBGA-60
Is it lead-free? Lead free Lead free Lead free Lead free Lead free Lead free Lead free Lead free
Is it Rohs certified? conform to conform to conform to conform to conform to conform to conform to conform to
Maker Integrated Silicon Solution ( ISSI ) Integrated Silicon Solution ( ISSI ) Integrated Silicon Solution ( ISSI ) Integrated Silicon Solution ( ISSI ) Integrated Silicon Solution ( ISSI ) Integrated Silicon Solution ( ISSI ) Integrated Silicon Solution ( ISSI ) Integrated Silicon Solution ( ISSI )
Parts packaging code TSOP2 TSOP2 BGA BGA TSOP2 TSOP2 BGA BGA
package instruction TSOP2, TSOP50,.46,32 TSOP2, TSOP50,.46,32 TFBGA, BGA60,7X15,25 TFBGA, BGA60,7X15,25 TSOP2, TSOP50,.46,32 TSOP2, TSOP50,.46,32 TFBGA, BGA60,7X15,25 TFBGA, BGA60,7X15,25
Contacts 50 50 60 60 50 50 60 60
Reach Compliance Code compliant compliant compliant compliant compliant compliant compliant compliant
ECCN code EAR99 EAR99 EAR99 EAR99 EAR99 EAR99 EAR99 EAR99
access mode DUAL BANK PAGE BURST DUAL BANK PAGE BURST DUAL BANK PAGE BURST DUAL BANK PAGE BURST DUAL BANK PAGE BURST DUAL BANK PAGE BURST DUAL BANK PAGE BURST DUAL BANK PAGE BURST
Maximum access time 5.5 ns 5.5 ns 5.5 ns 5.5 ns 5.5 ns 5.5 ns 5.5 ns 5.5 ns
Other features AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH
Maximum clock frequency (fCLK) 143 MHz 143 MHz 166 MHz 166 MHz 166 MHz 166 MHz 143 MHz 143 MHz
I/O type COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
interleaved burst length 1,2,4,8 1,2,4,8 1,2,4,8 1,2,4,8 1,2,4,8 1,2,4,8 1,2,4,8 1,2,4,8
JESD-30 code R-PDSO-G50 R-PDSO-G50 R-PBGA-B60 R-PBGA-B60 R-PDSO-G50 R-PDSO-G50 R-PBGA-B60 R-PBGA-B60
JESD-609 code e3 e3 e1 e1 e3 e3 e1 e1
length 20.95 mm 20.95 mm 10.1 mm 10.1 mm 20.95 mm 20.95 mm 10.1 mm 10.1 mm
memory density 16777216 bit 16777216 bit 16777216 bit 16777216 bit 16777216 bit 16777216 bit 16777216 bit 16777216 bit
Memory IC Type SYNCHRONOUS DRAM SYNCHRONOUS DRAM SYNCHRONOUS DRAM SYNCHRONOUS DRAM SYNCHRONOUS DRAM SYNCHRONOUS DRAM SYNCHRONOUS DRAM SYNCHRONOUS DRAM
memory width 16 16 16 16 16 16 16 16
Humidity sensitivity level 3 3 3 3 3 3 3 3
Number of functions 1 1 1 1 1 1 1 1
Number of ports 1 1 1 1 1 1 1 1
Number of terminals 50 50 60 60 50 50 60 60
word count 1048576 words 1048576 words 1048576 words 1048576 words 1048576 words 1048576 words 1048576 words 1048576 words
character code 1000000 1000000 1000000 1000000 1000000 1000000 1000000 1000000
Operating mode SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS
Maximum operating temperature 85 °C 70 °C 70 °C 85 °C 70 °C 85 °C 85 °C 70 °C
organize 1MX16 1MX16 1MX16 1MX16 1MX16 1MX16 1MX16 1MX16
Output characteristics 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSOP2 TSOP2 TFBGA TFBGA TSOP2 TSOP2 TFBGA TFBGA
Encapsulate equivalent code TSOP50,.46,32 TSOP50,.46,32 BGA60,7X15,25 BGA60,7X15,25 TSOP50,.46,32 TSOP50,.46,32 BGA60,7X15,25 BGA60,7X15,25
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE SMALL OUTLINE, THIN PROFILE GRID ARRAY, THIN PROFILE, FINE PITCH GRID ARRAY, THIN PROFILE, FINE PITCH SMALL OUTLINE, THIN PROFILE SMALL OUTLINE, THIN PROFILE GRID ARRAY, THIN PROFILE, FINE PITCH GRID ARRAY, THIN PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius) 260 260 260 260 260 260 260 260
power supply 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
refresh cycle 2048 2048 2048 2048 2048 2048 2048 2048
Maximum seat height 1.2 mm 1.2 mm 1.2 mm 1.2 mm 1.2 mm 1.2 mm 1.2 mm 1.2 mm
self refresh YES YES YES YES YES YES YES YES
Continuous burst length 1,2,4,8,FP 1,2,4,8,FP 1,2,4,8,FP 1,2,4,8,FP 1,2,4,8,FP 1,2,4,8,FP 1,2,4,8,FP 1,2,4,8,FP
Maximum standby current 0.004 A 0.002 A 0.002 A 0.004 A 0.002 A 0.004 A 0.004 A 0.002 A
Maximum slew rate 0.16 mA 0.14 mA 0.16 mA 0.17 mA 0.16 mA 0.17 mA 0.16 mA 0.14 mA
Maximum supply voltage (Vsup) 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V
Minimum supply voltage (Vsup) 3 V 3 V 3 V 3 V 3 V 3 V 3 V 3 V
Nominal supply voltage (Vsup) 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V
surface mount YES YES YES YES YES YES YES YES
technology CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS
Temperature level INDUSTRIAL COMMERCIAL COMMERCIAL INDUSTRIAL COMMERCIAL INDUSTRIAL INDUSTRIAL COMMERCIAL
Terminal surface Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed Tin/Silver/Copper (Sn/Ag/Cu) Tin/Silver/Copper (Sn/Ag/Cu) Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed Tin/Silver/Copper (Sn/Ag/Cu) Tin/Silver/Copper (Sn/Ag/Cu)
Terminal form GULL WING GULL WING BALL BALL GULL WING GULL WING BALL BALL
Terminal pitch 0.8 mm 0.8 mm 0.65 mm 0.65 mm 0.8 mm 0.8 mm 0.65 mm 0.65 mm
Terminal location DUAL DUAL BOTTOM BOTTOM DUAL DUAL BOTTOM BOTTOM
Maximum time at peak reflow temperature 10 10 10 10 10 10 10 10
width 10.16 mm 10.16 mm 6.4 mm 6.4 mm 10.16 mm 10.16 mm 6.4 mm 6.4 mm

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