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CA91C042-33CB

Description
VME Bus Controller, CMOS, CBGA324, CERAMIC, BGA-324
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size3MB,306 Pages
ManufacturerTundra Semiconductor Corp
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CA91C042-33CB Overview

VME Bus Controller, CMOS, CBGA324, CERAMIC, BGA-324

CA91C042-33CB Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerTundra Semiconductor Corp
package instructionCERAMIC, BGA-324
Reach Compliance Codeunknown
Address bus width64
Bus compatibilityPCI
maximum clock frequency64 MHz
Maximum data transfer rate70 MBps
Drive interface standardsANSI VME64
External data bus width64
JESD-30 codeS-CBGA-B324
JESD-609 codee0
length21 mm
Number of terminals324
Maximum operating temperature70 °C
Minimum operating temperature
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeBGA
Encapsulate equivalent codeBGA324,20X20,40
Package shapeSQUARE
Package formGRID ARRAY
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
Certification statusNot Qualified
Maximum seat height3.5 mm
Maximum supply voltage5.5 V
Minimum supply voltage4.5 V
Nominal supply voltage5 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formBALL
Terminal pitch1 mm
Terminal locationBOTTOM
Maximum time at peak reflow temperatureNOT SPECIFIED
width21 mm
uPs/uCs/peripheral integrated circuit typeBUS CONTROLLER, VME

CA91C042-33CB Preview

The information in this document is subject to change without notice and should not be construed as a
commitment by Newbridge Microsystems. While reasonable precautions have been taken, Newbridge
Microsystems assumes no responsibility for any errors that may appear in this document.
No part of this document may be copied or reproduced in any form or by any means without the prior written
consent of Newbridge Microsystems.
The acceptance of this document will be construed as an acceptance of the foregoing conditions.
Openbus™ Interface Components - Universe User Manual
Copyright 196, Tundra Semiconductor Corporation
All rights reserved.
Document: 891042.MD300.05
Printed in Canada
® BI-mode is a registered trademark of DY-4 Systems Inc., denoting the Bus Isolation mode
ii
Table of Contents
1
General Information ............................................................................................ 1-1
1.1
1.2
1.3
1.4
Introduction............................................................................................. 1-1
Product Overview ................................................................................... 1-1
Using This Document ............................................................................. 1-3
Conventions ............................................................................................ 1-4
1.4.1
1.4.2
1.4.3
2
Signals .................................................................................... 1-4
Symbols.................................................................................. 1-4
Terminology ........................................................................... 1-4
Functional Description......................................................................................... 2-1
2.1
Architectural Overview........................................................................... 2-1
2.1.1
2.1.1.1
2.1.1.2
2.1.2
2.1.2.1
2.1.2.2
2.1.3
2.1.3.1
2.1.3.2
2.1.4
2.2
2.2.1
2.2.1.1
2.2.1.2
2.2.1.3
2.2.2
2.2.2.1
2.2.2.2
VMEbus Interface ................................................................. 2-3
Universe as VMEbus Slave ............................................ 2-3
Universe as VMEbus Master .......................................... 2-3
PCI Bus Interface ................................................................... 2-4
Universe as PCI Slave..................................................... 2-4
Universe as PCI Master .................................................. 2-4
Interrupter and Interrupt Handler ........................................... 2-4
Interrupter ....................................................................... 2-4
VMEbus Interrupt Handling ........................................... 2-5
DMA Controller ..................................................................... 2-5
VMEbus Requester ................................................................ 2-6
Internal Arbitration for VMEbus Requests..................... 2-6
Request Modes................................................................ 2-7
VMEbus Release............................................................. 2-8
Universe as VME Master ....................................................... 2-9
Addressing Capabilities .................................................. 2-9
Data Transfer Capabilities ............................................ 2-10
VMEbus Interface ................................................................................... 2-6
i
This document was created with FrameMaker 4.0.4
2.2.2.3
2.2.3
2.2.3.1
2.2.3.2
2.2.3.3
2.2.3.4
2.2.3.5
2.2.3.6
2.2.3.7
2.2.4
2.2.4.1
2.2.4.2
2.2.5
2.2.5.1
2.2.5.2
2.2.6
2.2.6.1
2.2.6.2
2.2.6.3
2.2.6.4
2.2.7
2.3
2.3.1
2.3.1.1
2.3.1.2
2.3.1.3
2.3.1.4
2.3.1.5
2.3.1.6
2.3.2
2.3.2.1
Cycle Terminations ....................................................... 2-12
Universe as VME Slave ....................................................... 2-12
Coupled Transfers ......................................................... 2-13
Posted Writes ................................................................ 2-14
Prefetched Block Reads ................................................ 2-16
VMEbus Lock Commands............................................ 2-18
VMEbus Read Modify Writes ...................................... 2-18
Register Accesses.......................................................... 2-18
DTACK* Rescinding.................................................... 2-19
VMEbus Configuration ........................................................ 2-19
First Slot Detector ......................................................... 2-19
VMEbus Register Access at Power-up ......................... 2-19
Automatic Slot Identification ............................................... 2-20
Auto Slot ID: VME64 Specified................................... 2-20
Auto-ID: A Proprietary Tundra Method ....................... 2-21
System Controller Functions................................................ 2-22
System Clock Driver..................................................... 2-22
VMEbus Arbiter............................................................ 2-23
IACK Daisy-Chain Driver Module............................... 2-23
VMEbus Time-out ........................................................ 2-24
BI-Mode
®..................................................................................................
2-24
PCI Cycles - Overview......................................................... 2-25
32-Bit Versus 64-Bit PCI.............................................. 2-25
PCI Bus Request ........................................................... 2-26
Address Phase ............................................................... 2-26
Data Transfer ................................................................ 2-28
Termination Phase ........................................................ 2-28
Parity Checking............................................................. 2-29
Universe as PCI Master........................................................ 2-30
PCI Burst Transfers....................................................... 2-31
PCI Bus Interface .................................................................................. 2-25
ii
2.3.2.2
2.3.2.3
2.3.3
2.3.3.1
2.3.3.2
2.3.3.3
2.3.3.4
2.3.3.5
2.3.3.6
2.4
2.4.1
2.4.1.1
2.4.1.2
2.4.1.3
2.4.2
2.4.2.1
2.4.2.2
2.4.2.3
2.4.3
2.5
2.5.1
2.5.2
2.5.2.1
2.5.2.2
2.5.2.3
2.5.2.4
2.6
2.6.1
2.6.2
2.6.3
Termination................................................................... 2-32
Parity ............................................................................. 2-33
Universe as PCI Slave .......................................................... 2-33
Data Transfer ................................................................ 2-34
Coupled Transfers......................................................... 2-37
Posted Writes ................................................................ 2-38
RMW and ADOH Cycles ............................................. 2-40
Exclusive Accesses ....................................................... 2-41
Terminations ................................................................. 2-43
VME Slave Images .............................................................. 2-44
VMEbus Fields ............................................................. 2-45
PCI Bus Fields .............................................................. 2-45
Control Fields................................................................ 2-46
PCI Bus Slave Images .......................................................... 2-47
PCI Bus Fields .............................................................. 2-48
VMEbus Fields ............................................................. 2-48
Control Fields................................................................ 2-49
Special PCI Slave Image ...................................................... 2-49
Coupled Cycles .................................................................... 2-52
Decoupled Transactions ....................................................... 2-52
Posted Writes ................................................................ 2-52
Prefetched Reads........................................................... 2-54
DMA Errors .................................................................. 2-54
Parity Errors .................................................................. 2-55
The Interrupt Channel .......................................................... 2-56
PCI Interrupt Generation...................................................... 2-57
VMEbus Interrupt Generation.............................................. 2-59
Slave Image Programming.................................................................... 2-44
Bus Error Handling ............................................................................... 2-52
Interrupter.............................................................................................. 2-56
iii

CA91C042-33CB Related Products

CA91C042-33CB CA91C042-33CE
Description VME Bus Controller, CMOS, CBGA324, CERAMIC, BGA-324 VME Bus Controller, CMOS, PBGA313, PLASTIC, BGA-313
Is it Rohs certified? incompatible incompatible
Maker Tundra Semiconductor Corp Tundra Semiconductor Corp
package instruction CERAMIC, BGA-324 PLASTIC, BGA-313
Reach Compliance Code unknown unknown
Address bus width 64 64
Bus compatibility PCI PCI
maximum clock frequency 64 MHz 64 MHz
Maximum data transfer rate 70 MBps 70 MBps
Drive interface standards ANSI VME64 ANSI VME64
External data bus width 64 64
JESD-30 code S-CBGA-B324 S-PBGA-B313
JESD-609 code e0 e0
length 21 mm 35 mm
Number of terminals 324 313
Maximum operating temperature 70 °C 70 °C
Package body material CERAMIC, METAL-SEALED COFIRED PLASTIC/EPOXY
encapsulated code BGA BGA
Encapsulate equivalent code BGA324,20X20,40 BGA313,25X25,50
Package shape SQUARE SQUARE
Package form GRID ARRAY GRID ARRAY
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED
power supply 5 V 5 V
Certification status Not Qualified Not Qualified
Maximum seat height 3.5 mm 2.63 mm
Maximum supply voltage 5.5 V 5.5 V
Minimum supply voltage 4.5 V 4.5 V
Nominal supply voltage 5 V 5 V
surface mount YES YES
technology CMOS CMOS
Temperature level COMMERCIAL COMMERCIAL
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal form BALL BALL
Terminal pitch 1 mm 1.27 mm
Terminal location BOTTOM BOTTOM
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED
width 21 mm 35 mm
uPs/uCs/peripheral integrated circuit type BUS CONTROLLER, VME BUS CONTROLLER, VME

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