QL3004-3PL68I datasheet, PDF - EEWORLD Datasheet

QL3004-3PL68I: DescriptionField Programmable Gate Array, 96 CLBs, 4000 Gates, 96-Cell, CMOS, PQCC68, PLASTIC, LCC-68; CategoryProgrammable logic devices Programmable logic; File Size202KB，6 Pages; ManufacturerQuickLogic Corporation; Websitehttps://www.quicklogic.com

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QL3004-3PL68I Overview

Field Programmable Gate Array, 96 CLBs, 4000 Gates, 96-Cell, CMOS, PQCC68, PLASTIC, LCC-68

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	QuickLogic Corporation
Parts packaging code	LCC
package instruction	QCCJ, LDCC68,1.0SQ
Contacts	68
Reach Compliance Code	compliant
Combined latency of CLB-Max	2.88 ns
JESD-30 code	S-PQCC-J68
JESD-609 code	e0
length	24.1808 mm
Humidity sensitivity level	3
Configurable number of logic blocks	96
Equivalent number of gates	4000
Number of entries	54
Number of logical units	96
Output times	46
Number of terminals	68
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	96 CLBS, 4000 GATES
Package body material	PLASTIC/EPOXY
encapsulated code	QCCJ
Encapsulate equivalent code	LDCC68,1.0SQ
Package shape	SQUARE
Package form	CHIP CARRIER
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	3.3,3.3/5 V
Programmable logic type	FIELD PROGRAMMABLE GATE ARRAY
Certification status	Not Qualified
Maximum seat height	4.57 mm
Maximum supply voltage	3.6 V
Minimum supply voltage	3 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	24.1808 mm

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