MT58L256L18F1B-7.5 datasheet, PDF

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MT58L256L18F1B-7.5: DescriptionStandard SRAM, 256KX18, 7.5ns, CMOS, PBGA119, 14 X 22 MM, PLASTIC, MS-028BHA, BGA-119; Categorystorage storage; File Size349KB，31 Pages; ManufacturerMicron Technology; Websitehttp://www.mdtic.com.tw/

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MT58L256L18F1B-7.5 Overview

Standard SRAM, 256KX18, 7.5ns, CMOS, PBGA119, 14 X 22 MM, PLASTIC, MS-028BHA, BGA-119

MT58L256L18F1B-7.5 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Micron Technology
Parts packaging code	BGA
package instruction	14 X 22 MM, PLASTIC, MS-028BHA, BGA-119
Contacts	119
Reach Compliance Code	not_compliant
ECCN code	3A991.B.2.A
Maximum access time	7.5 ns
Maximum clock frequency (fCLK)	113 MHz
I/O type	COMMON
JESD-30 code	R-PBGA-B119
JESD-609 code	e0
length	22 mm
memory density	4718592 bit
Memory IC Type	STANDARD SRAM
memory width	18
Number of functions	1
Number of terminals	119
word count	262144 words
character code	256000
Operating mode	SYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	256KX18
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	BGA
Encapsulate equivalent code	BGA119,7X17,50
Package shape	RECTANGULAR
Package form	GRID ARRAY
Parallel/Serial	PARALLEL
power supply	3.3 V
Certification status	Not Qualified
Maximum seat height	2.4 mm
Maximum standby current	0.01 A
Minimum standby current	3.14 V
Maximum slew rate	0.375 mA
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	3.135 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	BALL
Terminal pitch	1.27 mm
Terminal location	BOTTOM
width	14 mm

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4Mb: 256K x 18, 128K x 32/36

FLOW-THROUGH SYNCBURST SRAM

4Mb SYNCBURST

™

SRAM

FEATURES

• Fast clock and OE# access times

• Single +3.3V +0.3V/-0.165V power supply (V

)

• Separate +3.3V or +2.5V isolated output buffer

supply (V

• SNOOZE MODE for reduced-power standby

• Common data inputs and data outputs

• Individual BYTE WRITE control and GLOBAL WRITE

• Three chip enables for simple depth expansion

and address pipelining

• Clock-controlled and registered addresses, data

I/Os and control signals

• Internally self-timed WRITE cycle

• Burst control pin (interleaved or linear burst)

• Automatic power-down

• 165-pin FBGA package

• 100-pin TQFP package

• 119-pin BGA package

• Low capacitive bus loading

• x18, x32, and x36 versions available

MT58L256L18F1, MT58L128L32F1,

MT58L128L36F1; MT58L256V18F1,

MT58L128V32F1, MT58L128V36F1

3.3V V

, 3.3V or 2.5V I/O, Flow-Through

100-Pin TQFP

165-Pin FBGA

(Preliminary Package Data)

OPTIONS

• Timing (Access/Cycle/MHz)

6.8ns/7.5ns/133 MHz

7.5ns/8.8ns/113 MHz

8.5ns/10ns/100 MHz

10ns/15ns/66 MHz

• Configurations

3.3V I/O

256K x 18

128K x 32

128K x 36

2.5V I/O

256K x 18

128K x 32

128K x 36

• Packages

100-pin TQFP

165-pin FBGA

119-pin, 14mm x 22mm BGA

• Operating Temperature Range

Commercial (0°C to +70°C)

Industrial (-40°C to +85°C)**

Part Number Example:

MARKING

-6.8

-7.5

-8.5

-10

MT58L256L18F1

MT58L128L32F1

MT58L128L36F1

MT58L256V18F1

MT58L128V32F1

MT58L128V36F1

None

119-Pin BGA

MT58L256L18F1T-8.5

* A Part Marking Guide for the FBGA devices can be found on Micron’s

Web site—http://www.micron.com/support/index.html.

** Industrial temperature range offered in specific speed grades and

configurations. Contact factory for more information.

4Mb: 256K x 18, 128K x 32/36 Flow-Through SyncBurst SRAM

MT58L256L18F1_D.p65 – Rev. 10/01

NOTE:

1. JEDEC-standard MS-026 BHA (LQFP).

2. JEDEC-standard MS-028 BHA (PBGA).

Micron Technology, Inc., reserves the right to change products or specifications without notice.

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