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Datasheet> All Categories > Analog mixed-signal IC> converter> AD677KN
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AD677KN

Description
1-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDIP16, PLASTIC, DIP-16
CategoryAnalog mixed-signal IC    converter   
File Size1MB，17 Pages
ManufacturerRochester Electronics
Websitehttps://www.rocelec.com/
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AD677KN Overview

1-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDIP16, PLASTIC, DIP-16

AD677KN Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerRochester Electronics
Parts packaging codeDIP
package instructionPLASTIC, DIP-16
Contacts16
Reach Compliance Codeunknown
Maximum analog input voltage10 V
Minimum analog input voltage-10 V
Converter typeADC, SUCCESSIVE APPROXIMATION
JESD-30 codeR-PDIP-T16
JESD-609 codee0
length20.13 mm
Maximum linear error (EL)0.0023%
Humidity sensitivity levelNOT APPLICABLE
Nominal negative supply voltage-12 V
Number of analog input channels1
Number of digits16
Number of functions1
Number of terminals16
Maximum operating temperature70 °C
Minimum operating temperature
Output bit codeBINARY
Output formatSERIAL
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Package shapeRECTANGULAR
Package formIN-LINE
Peak Reflow Temperature (Celsius)NOT APPLICABLE
Sampling rate0.1 MHz
Sample and hold/Track and holdSAMPLE
Maximum seat height5.33 mm
Nominal supply voltage12 V
surface mountNO
technologyBICMOS
Temperature levelCOMMERCIAL
Terminal surfaceTIN LEAD
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT APPLICABLE
width7.62 mm

AD677KN Preview

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FEATURES
Autocalibrating
On-Chip Sample-Hold Function
Serial Output
16 Bits No Missing Codes
1 LSB INL
–99 dB THD
92 dB S/(N+D)
1 MHz Full Power Bandwidth
V
IN
AGND SENSE
V
R E F
AGND
10
9
11
8
INPUT
BUFFERS
16-Bit 100 kSPS
Sampling ADC
AD677
FUNCTIONAL BLOCK DIAGRAM
A CHIP
16-BIT
DAC
CAL
DAC
LOGIC TIMING
LEVEL TRANSLATORS
COMP
15 BUSY
14 SCLK
CAL 16
CLK
SAMPLE
2
1
MICROCODED
CONTROLLER
SAR
ALU
RAM
D CHIP
3 SDATA
AD677
PRODUCT DESCRIPTION
PRODUCT HIGHLIGHTS
The AD677 is a multipurpose 16-bit serial output analog-to-
digital converter which utilizes a switched-capacitor/charge
redistribution architecture to achieve a 100 kSPS conversion
rate (10
µs
total conversion time). Overall performance is opti-
mized by digitally correcting internal nonlinearities through
on-chip autocalibration.
The AD677 circuitry is segmented onto two monolithic chips—
a digital control chip fabricated on Analog Devices DSP CMOS
process and an analog ADC chip fabricated on our BiMOS II
process. Both chips are contained in a single package.
The AD677 is specified for ac (or “dynamic”) parameters such
as S/(N+D) Ratio, THD and IMD which are important in sig-
nal processing applications. In addition, dc parameters are
specified which are important in measurement applications.
The AD677 operates from +5 V and
±
12 V supplies and typi-
cally consumes 450 mW using a 10 V reference (360 mW with
5 V reference) during conversion. The digital supply (V
DD
) is
separated from the analog supplies (V
CC
, V
EE
) for reduced digi-
tal crosstalk. An analog ground sense is provided to remotely
sense the ground potential of the signal source. This can be use-
ful if the signal has to be carried some distance to the A/D con-
verter. Separate analog and digital grounds are also provided.
The AD677 is available in a 16-pin narrow plastic DIP, 16-pin
narrow side-brazed ceramic package, or 28-lead SOIC. A paral-
lel output version, the AD676, is available in a 28-pin ceramic
or plastic DIP. All models operate over a commercial tempera-
ture range of 0°C to +70°C or an industrial range of –40°C to
+85°C.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
1. Autocalibration provides excellent dc performance while
eliminating the need for user adjustments or additional exter-
nal circuitry.
2.
±
5 V to
±
10 V input range (± V
REF
).
3. Available in 16-pin 0.3" skinny DIP or 28-lead SOIC.
4. Easy serial interface to standard ADI DSPs.
5. TTL compatible inputs/outputs.
6. Excellent ac performance: –99 dB THD, 92 dB S/(N+D)
peak spurious –101 dB.
7. Industry leading dc performance: 1.0 LSB INL,
±
1 LSB full
scale and offset.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
AD677–SPECIFICATIONS
AC SPECIFICATIONS
(T
Parameter
Total Harmonic Distortion (THD)
2
@ 83 kSPS, T
MIN
to T
MAX
@ 100 kSPS, +25°C
@ 100 kSPS, T
MIN
to T
MAX
Signal-to-Noise and Distortion Ratio (S/(N+D))
2, 3
@ 83 kSPS, T
MIN
to T
MAX
@ 100 kSPS, +25°C
@ 100 kSPS, T
MIN
to T
MAX
Peak Spurious or Peak Harmonic Component
Intermodulation Distortion (IMD)
4
2nd Order Products
3rd Order Products
Full Power Bandwidth
Noise
MIN
to T
MAX,
V
CC
= +12 V
5%, V
EE
= –12 V
Min
AD677J/A
Typ
–97
–97
–93
89
89
91
91
89
–101
–102
–98
1
160
MIN
5%, V
DD
= +5 V
Max
–92
–92
Min
10%)
1
AD677K/B
Typ
Max
–99
–99
–95
–95
–95
Units
dB
dB
dB
dB
dB
dB
dB
dB
dB
MHz
µV
rms
90
90
92
92
90
–101
–102
–98
1
160
DIGITAL SPECIFICATIONS
(for all grades T
Parameter
LOGIC INPUTS
V
IH
High Level Input Voltage
V
IL
Low Level Input Voltage
I
IH
High Level Input Current
I
IL
Low Level Input Current
C
IN
Input Capacitance
LOGIC OUTPUTS
V
OH
High Level Output Voltage
V
OL
Low Level Output Voltage
to T
MAX
, V
CC
= +12 V
Min
2.0
–0.3
–10
–10
5%, V
EE
= –12 V
Typ
Max
5%, V
DD
= +5 V
Units
V
V
µA
µA
pF
V
V
V
10%)
Test Conditions
V
IH
= V
DD
V
IL
= 0 V
V
DD
+ 0.3
0.8
+10
+10
10
I
OH
= 0.1 mA
I
OH
= 0.5 mA
I
OL
= 1.6 mA
V
DD
– 1 V
2.4
0.4
NOTES
1
V
REF
= 10.0 V, Conversion Rate = 100 kSPS, f
lN
= 1.0 kHz, V
IN
= –0.05 dB, Bandwidth = 50 kHz unless otherwise indicated. All measurements referred to a 0 dB
(20 V p-p) input signal. Values are post-calibration.
2
For other input amplitudes, refer to Figure 12.
3
For dynamic performance with different reference values see Figure 11.
4
fa = 1008 Hz, fb = 1055 Hz. See Definition of Specifications section and Figure 16.
Specifications subject to change without notice.
–2–
REV. A
DC SPECIFICATIONS
(T
Parameter
TEMPERATURE RANGE
J, K Grades
A, B Grades
AD677
to T
MAX
, V
CC
= +12 V
5%, V
EE
= –12 V
Min
0
–40
16
±
1
±
1
±
2
16
±
2
±
2
±
2
±
4
±
0.5
±
0.5
±
0.5
5
10
±
V
REF
*
2
50*
6
100
6
100
*
2
50*
5
MIN
5%, V
DD
= +5 V
1O%)
1
Min
0
–40
16
±
1
+1
±
2
±
1.5
±
1.5
±
3
±
3
±
3
AD677K/B
Typ
Max
+70
+85
Units
°C
°C
Bits
LSB
LSB
LSB
Bits
LSB
LSB
LSB
LSB
LSB
LSB
LSB
10
±
V
REF
V
V
µs
pF
ns
ps
AD677J/A
Typ
Max
+70
+85
ACCURACY
Resolution
Integral Nonlinearity (INL)
@ 83 kSPS, T
MIN
to T
MAX
@ 100 kSPS, +25°C
@ 100 kSPS, T
MIN
to T
MAX
Differential Nonlinearity (DNL)–No Missing Codes
Bipolar Zero Error
2
Positive, Negative FS Errors
2
@ 83 kSPS
@ 100 kSPS, +25°C
@ 100 kSPS
TEMPERATURE DRIFT
3
Bipolar Zero
Postive Full Scale
Negative Full Scale
VOLTAGE REFERENCE INPUT RANGE
4
(V
REF
)
ANALOG INPUT
5
Input Range (V
IN
)
Input Impedance
Input Settling Time
Input Capacitance During Sample
Aperture Delay
Aperture Jitter
POWER SUPPLIES
Power Supply Rejection
6
V
CC
= +12 V
±
5%
V
EE
= –12 V
±
5%
V
DD
= +5 V
±
10%
Operating Current
V
REF
= +5 V
I
CC
I
EE
I
DD
Power Consumption
V
REF
= +10 V
I
CC
I
EE
I
DD
Power Consumption
±
4
±
4
±
4
16
±
1
±
1
±
1
±
4
±
0.5
±
0.5
±
0.5
±
0.5
±
0.5
±
0.5
14.5
14.5
3
360
18
18
3
450
18
18
5
480
24
24
5
630
±
0.5
±
0.5
±
0.5
14.5
14.5
3
360
18
18
3
450
18
18
5
480
24
24
5
630
LSB
LSB
LSB
mA
–mA
mA
mW
mA
–mA
mA
mW
NOTES
1
V
REF
= 10.0 V, Conversion Rate = 100 kSPS unless otherwise noted. Values are post-calibration.
2
Values shown apply to any temperature from T
MIN
to T
MAX
after calibration at that temperature at nominal supplies.
3
Values shown are based upon calibration at +25°C with no additional calibration at temperature. Values shown are the typical variation from the value at +25
°C.
4
See “APPLICATIONS” section for recommended voltage reference circuit, and Figure 11 for dynamic performance with other reference voltage values.
5
See “APPLICATIONS” section for recommended input buffer circuit.
6
Typical deviation of bipolar zero, –full scale or +full scale from min to max rating.
*For explanation of input characteristics, see “ANALOG INPUT” section.
Specifications subject to change without notice.
REV. A
–3–
AD677
TIMING SPECIFICATIONS
(T
Parameter
Conversion Period
2, 3
CLK Period
4
Calibration Time
Sampling Time
Last CLK to SAMPLE Delay
5
SAMPLE Low
SAMPLE to Busy Delay
1st CLK Delay
CLK Low
6
CLK High
6
CLK to BUSY Delay
CLK to SDATA Valid
CLK to SCLK High
SCLK Low
SDATA to SCLK High
CAL High Time
CAL to BUSY Delay
MIN
to T
MAX
, V
CC
= +12 V
Symbol
t
C
t
CLK
t
CT
t
S
t
LCS
t
SL
t
SS
t
FCD
t
CL
t
CH
t
CB
t
CD
t
CSH
t
SCL
t
DSH
t
CALH
t
CALB
5%, V
EE
= –12 V
Min
10
480
2
2.1
100
5%, V
DD
= +5 V
Typ
10%)
1
Max
1000
85532
Units
µs
ns
t
CLK
µs
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
30
50
50
50
50
100
50
50
50
180
100
180
80
80
15
75
300
175
300
50
NOTES
1
See the “CONVERSION CONTROL” and “AUTOCALIBRATION” sections for detailed explanations of the above timing.
2
Depends upon external clock frequency; includes acquisition time and conversion time. The maximum conversion period is specified to account for the droop of the
internal sample/hold function. Operation at slower rates may degrade performance.
3
t
C
= t
FCD
+ 16
×
t
CLK
+ t
LCS
.
4
580 ns is recommended for optimal accuracy over temperature (not necessary during calibration cycle).
5
If SAMPLE goes high before the 17th CLK pulse, the device will start sampling approximately 100 ns after the rising edge of the 17th CLK pulse.
6
t
CH
+ t
CL
= t
CLK
and must be greater than 480 ns.
t
CALH
t
CT
CAL
(INPUT)
t
CALB
BUSY
(OUTPUT)
CLK
*
(INPUT)
t
FCD
1
2
3
85530
85531
t
CB
t
CH
t
CL
t
CLK
85532
*
SHADED PORTIONS OF INPUT SIGNALS ARE OPTIONAL. FOR BEST PERFORMANCE, WE
RECOMMEND THAT THESE SIGNALS BE HELD LOW EXCEPT WHEN EXPLICITY SHOWN HIGH.
Figure 1. Calibration Timing
t
S
SAMPLE*
(INPUT)
t
SL
t
C
t
S
t
SB
BUSY
(OUTPUT)
t
FCD
t
CH
CLK
*
(INPUT)
1
2
t
CB
t
LCS
t
CL
3
15
16
17
t
CLK
SCLK
(OUTPUT)
t
CSH
t
SCL
t
CD
SDATA
(OUTPUT)
OLD BIT 16
MSB
BIT
2
t
DSH
BIT
13
BIT
14
BIT
15
BIT
16
*
SHADED PORTIONS OF INPUT SIGNALS ARE OPTIONAL. FOR BEST PERFORMANCE, WE
RECOMMEND THAT THESE SIGNALS BE HELD LOW EXCEPT WHEN EXPLICITY SHOWN HIGH.
Figure 2. General Conversion Timing
–4–
REV. A
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AD677KN AD677JNZ AD677AD AD677KRZ AD677JR AD677KR AD677KD AD677JD AD677JR-REEL
Description 1-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDIP16, PLASTIC, DIP-16 1-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDIP16, PLASTIC, DIP-16 1-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, CDIP16, SIDE BRAZED, CERAMIC, DIP-16 1-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO28, PLASTIC, SOIC-28 1-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO28, PLASTIC, SOIC-28 1-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO28, PLASTIC, SOIC-28 1-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, CDIP16, SIDE BRAZED, CERAMIC, DIP-16 1-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, CDIP16, SIDE BRAZED, CERAMIC, DIP-16 1-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO28, PLASTIC, SOIC-28
Is it lead-free? Contains lead Lead free Contains lead Lead free Contains lead Contains lead Contains lead Contains lead Contains lead
Is it Rohs certified? incompatible conform to incompatible conform to incompatible incompatible incompatible incompatible incompatible
Maker Rochester Electronics Rochester Electronics Rochester Electronics Rochester Electronics Rochester Electronics Rochester Electronics Rochester Electronics Rochester Electronics Rochester Electronics
Parts packaging code DIP DIP DIP SOIC SOIC SOIC DIP DIP SOIC
package instruction PLASTIC, DIP-16 DIP, DIP, SOP, SOP, SOP, DIP, DIP, SOP,
Contacts 16 16 16 28 28 28 16 16 28
Reach Compliance Code unknown unknown unknown unknown unknown unknown unknown unknown unknown
Maximum analog input voltage 10 V 10 V 10 V 10 V 10 V 10 V 10 V 10 V 10 V
Minimum analog input voltage -10 V -10 V -10 V -10 V -10 V -10 V -10 V -10 V -10 V
Converter type ADC, SUCCESSIVE APPROXIMATION ADC, SUCCESSIVE APPROXIMATION ADC, SUCCESSIVE APPROXIMATION ADC, SUCCESSIVE APPROXIMATION ADC, SUCCESSIVE APPROXIMATION ADC, SUCCESSIVE APPROXIMATION ADC, SUCCESSIVE APPROXIMATION ADC, SUCCESSIVE APPROXIMATION ADC, SUCCESSIVE APPROXIMATION
JESD-30 code R-PDIP-T16 R-PDIP-T16 R-CDIP-T16 R-PDSO-G28 R-PDSO-G28 R-PDSO-G28 R-CDIP-T16 R-CDIP-T16 R-PDSO-G28
length 20.13 mm 20.13 mm 19.05 mm 17.9 mm 17.9 mm 17.9 mm 19.05 mm 19.05 mm 17.9 mm
Humidity sensitivity level NOT APPLICABLE NOT APPLICABLE NOT SPECIFIED 5 5 5 NOT SPECIFIED NOT SPECIFIED 5
Nominal negative supply voltage -12 V -12 V -12 V -12 V -12 V -12 V -12 V -12 V -12 V
Number of analog input channels 1 1 1 1 1 1 1 1 1
Number of digits 16 16 16 16 16 16 16 16 16
Number of functions 1 1 1 1 1 1 1 1 1
Number of terminals 16 16 16 28 28 28 16 16 28
Maximum operating temperature 70 °C 70 °C 85 °C 70 °C 70 °C 70 °C 70 °C 70 °C 70 °C
Output bit code BINARY BINARY BINARY BINARY BINARY BINARY BINARY BINARY BINARY
Output format SERIAL SERIAL SERIAL SERIAL SERIAL SERIAL SERIAL SERIAL SERIAL
Package body material PLASTIC/EPOXY PLASTIC/EPOXY CERAMIC, METAL-SEALED COFIRED PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED PLASTIC/EPOXY
encapsulated code DIP DIP DIP SOP SOP SOP DIP DIP SOP
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form IN-LINE IN-LINE IN-LINE SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE IN-LINE IN-LINE SMALL OUTLINE
Peak Reflow Temperature (Celsius) NOT APPLICABLE NOT APPLICABLE NOT SPECIFIED 260 240 240 NOT SPECIFIED NOT SPECIFIED 240
Sampling rate 0.1 MHz 0.1 MHz 0.1 MHz 0.1 MHz 0.1 MHz 0.1 MHz 0.1 MHz 0.1 MHz 0.1 MHz
Sample and hold/Track and hold SAMPLE SAMPLE SAMPLE SAMPLE SAMPLE SAMPLE SAMPLE SAMPLE SAMPLE
Maximum seat height 5.33 mm 5.33 mm 5.08 mm 2.65 mm 2.65 mm 2.65 mm 5.08 mm 5.08 mm 2.65 mm
Nominal supply voltage 12 V 12 V 12 V 12 V 12 V 12 V 12 V 12 V 12 V
surface mount NO NO NO YES YES YES NO NO YES
technology BICMOS BICMOS BICMOS BICMOS BICMOS BICMOS BICMOS BICMOS BICMOS
Temperature level COMMERCIAL COMMERCIAL INDUSTRIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL
Terminal surface TIN LEAD MATTE TIN NOT SPECIFIED MATTE TIN TIN LEAD TIN LEAD NOT SPECIFIED NOT SPECIFIED TIN LEAD
Terminal form THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE GULL WING GULL WING GULL WING THROUGH-HOLE THROUGH-HOLE GULL WING
Terminal pitch 2.54 mm 2.54 mm 2.54 mm 1.27 mm 1.27 mm 1.27 mm 2.54 mm 2.54 mm 1.27 mm
Terminal location DUAL DUAL DUAL DUAL DUAL DUAL DUAL DUAL DUAL
Maximum time at peak reflow temperature NOT APPLICABLE NOT APPLICABLE NOT SPECIFIED 40 30 30 NOT SPECIFIED NOT SPECIFIED 30
width 7.62 mm 7.62 mm 7.62 mm 7.5 mm 7.5 mm 7.5 mm 7.62 mm 7.62 mm 7.5 mm
JESD-609 code e0 e3 - e3 e0 e0 - - e0

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ANDROID wearable device advanced programming: https://download.eeworld.com.cn/detail/baidu_linker/610871...
MartinFowler Embedded System
37L2 wifi cloud serial port module remotely burns programs to STC51/STM32/ESP8266 across other provinces 485-RTU remote group
37L2 moduleSTC-ISP remote programming STC MCU37L2 moduleprawn serial port tool remotely burn STM32F10337L2 moduleESP8266_FlashLoader remotely burn ESP8266Multiple 37L2 modules remote 485-RTU group tra...
cortex_M3 MCU
A collection of advanced FPGA learning route materials, free points download for a limited time!
Thanks to the netizen aerobotics for summarizing the learning materials based on a long-standing classic FPGA learning route. The learning route comes from the csdn netizen "Captain-Leader", and I als...
EEWORLD社区 Download Centre
You can do anything you want! DLP Pico chipset can also be used in this way
I believe everyone is familiar with DLP Pico chipsets and their applications. However, most people only know what DLP Pico chipsets can do in their own fields, such as micro-projection or head-up disp...
EEWORLD社区 TI Technology Forum
LIS2DW12 three-axis accelerometer package and code
Data sheet:Code:Package:Official evaluation board gerber file:...
littleshrimp MEMS sensors
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