MC74VHC1G09
2-Input AND Gate with
Open Drain Output
The MC74VHC1G09 is an advanced high speed CMOS 2−input AND
gate with open drain output fabricated with silicon gate CMOS
technology. It achieves high speed operation similar to equivalent Bipolar
Schottky TTL while maintaining CMOS low power dissipation.
The internal circuit is composed of three stages, including an open
drain output which provides the capability to set output switching level.
This allows the MC74VHC1G09 to be used to interface 5 V circuits to
circuits of any voltage between V
CC
and 7 V using an external resistor
and power supply.
The MC74VHC1G09 input structure provides protection when
voltages up to 7 V are applied, regardless of the supply voltage.
Features
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MARKING
DIAGRAMS
5
SC−88A / SOT−353 / SC−70
DF SUFFIX
CASE 419A
VX M
G
G
M
1
•
•
•
•
•
•
High Speed: t
PD
= 4.3 ns (Typ) at V
CC
= 5 V
Low Internal Power Dissipation: I
CC
= 1
mA
(Max) at T
A
= 25°C
Power Down Protection Provided on Inputs
Pin and Function Compatible with Other Standard Logic Families
TSOP−5 / SOT−23 / SC−59
DT SUFFIX
CASE 483
VX
M
G
= Device Code
= Date Code*
= Pb−Free Package
VX M
G
G
Chip Complexity: FETs = 62; Equivalent Gates = 16
NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
•
These Devices are Pb−Free and are RoHS Compliant
(Note: Microdot may be in either location)
*Date Code orientation and/or position may
vary depending upon manufacturing location.
IN B
1
OVT
5
V
CC
1
2
3
4
5
PIN ASSIGNMENT
IN B
IN A
GND
OUT Y
V
CC
IN A
2
GND
3
4
OUT Y
FUNCTION TABLE
Figure 1. Pinout
(Top View)
Inputs
A
L
L
H
H
B
L
H
L
H
Output
Y
L
L
L
Z
IN A
IN B
&
OUT Y
Figure 2. Logic Symbol
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
©
Semiconductor Components Industries, LLC, 2013
October, 2013
−
Rev. 18
1
Publication Order Number:
MC74VHC1G09/D
MC74VHC1G09
MAXIMUM RATINGS
Symbol
V
CC
V
IN
V
OUT
I
IK
I
OK
I
OUT
I
CC
P
D
q
JA
T
L
T
J
T
stg
MSL
F
R
V
ESD
DC Supply Voltage
DC Input Voltage
DC Output Voltage
Input Diode Current
Output Diode Current
DC Output Current, per Pin
DC Supply Current, V
CC
and GND
Power dissipation in still air
Thermal resistance
Lead temperature, 1 mm from case for 10 s
Junction temperature under bias
Storage temperature
Moisture Sensitivity
Flammability Rating
ESD Withstand Voltage
Oxygen Index: 28 to 34
Human Body Model (Note 1)
Machine Model (Note 2)
Charged Device Model (Note 3)
Above V
CC
and Below GND at 125°C (Note 4)
SC−88A, TSOP−5
SC−88A, TSOP−5
Characteristics
Value
−0.5
to +7.0
−0.5
to +7.0
−0.5
to 7.0
−20
+20
+25
+50
200
333
260
+150
−65
to +150
Level 1
UL 94 V−0 @ 0.125 in
> 2000
> 200
N/A
±500
V
Unit
V
V
V
mA
mA
mA
mA
mW
°C/W
°C
°C
°C
I
Latchup
Latchup Performance
mA
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Tested to EIA/JESD22−A114−A
2. Tested to EIA/JESD22−A115−A
3. Tested to JESD22−C101−A
4. Tested to EIA/JESD78
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
IN
V
OUT
T
A
t
r
, t
f
DC Supply Voltage
DC Input Voltage
DC Output Voltage
Operating Temperature Range
Input Rise and Fall Time
V
CC
= 3.3 V
±
0.3 V
V
CC
= 5.0 V
±
0.5 V
Characteristics
Min
2.0
0.0
0.0
−55
0
0
Max
5.5
5.5
7.0
+125
100
20
Unit
V
V
V
°C
ns/V
Device Junction Temperature versus
Time to 0.1% Bond Failures
NORMALIZED FAILURE RATE
Junction
Temperature
°C
80
90
100
110
120
130
140
Time, Hours
1,032,200
419,300
178,700
79,600
37,000
17,800
8,900
Time, Years
117.8
47.9
20.4
9.4
4.2
2.0
1.0
FAILURE RATE OF PLASTIC = CERAMIC
UNTIL INTERMETALLICS OCCUR
TJ = 130
°
C
TJ = 100
°
C
TJ = 120
°
C
TJ = 110
°
C
TJ = 80
°
C
100
TIME, YEARS
TJ = 90
°
C
1
1
10
1000
Figure 3. Failure Rate vs. Time
Junction Temperature
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2
MC74VHC1G09
DC ELECTRICAL CHARACTERISTICS
Symbol
V
IH
Parameter
Minimum High−Level
Input Voltage
Test Conditions
V
CC
(V)
2.0
3.0
4.5
5.5
2.0
3.0
4.5
5.5
V
IN
= V
IH
or V
IL
I
OL
= 50
mA
V
IN
= V
IH
or V
IL
I
OL
= 4 mA
I
OL
= 8 mA
I
IN
I
CC
I
OFF
Maximum Input
Leakage Current
Maximum Quiescent
Supply Current
Power Off−Output
Leakage Current
V
IN
= 5.5 V or GND
V
IN
= V
CC
or GND
V
OUT
= 5.5 V
V
IN
= 5.5 V
2.0
3.0
4.5
3.0
4.5
0 to
5.5
5.5
0
0.0
0.0
0.0
T
A
= 25°C
Min
1.5
2.1
3.15
3.85
0.5
0.9
1.35
1.65
0.1
0.1
0.1
0.36
0.36
±0.1
1.0
0.25
Typ
Max
T
A
≤
85°C
Min
1.5
2.1
3.15
3.85
0.5
0.9
1.35
1.65
0.1
0.1
0.1
0.44
0.44
±1.0
20
2.5
Max
−55
≤
T
A
≤
125°C
Min
1.5
2.1
3.15
3.85
0.5
0.9
1.35
1.65
0.1
0.1
0.1
0.52
0.52
±1.0
40
5
Max
Unit
V
V
IL
Maximum Low−Level
Input Voltage
V
V
OL
Maximum Low−Level
Output Voltage
V
IN
= V
IH
or V
IL
V
V
mA
mA
mA
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î Î Î Î Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î Î Î Î Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î Î Î Î Î
Î
Î
Î Î Î Î Î Î Î Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
Î
Î Î Î Î Î Î Î Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
Î
Î Î Î Î Î Î Î Î
Î Î Î Î Î Î Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î Î Î Î Î
Î
Î
Î Î Î Î Î Î Î Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
Î
Î Î Î Î Î Î Î Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
Î
Î Î Î Î Î Î Î Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î Î Î Î Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î Î Î Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î Î Î Î Î
Î Î Î Î Î Î Î
Î
Î
Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
Î
Î Î Î
ÎÎÎÎÎÎÎ Î Î
Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î
Î
Î
Î ÎÎ
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
AC ELECTRICAL CHARACTERISTICS
C
load
= 50 pF, Input t
r
= t
f
= 3.0 ns
Symbol
t
PZL
Parameter
Test Conditions
Min
T
A
= 25°C
Typ
6.2
8.7
4.3
5.8
8.7
5.8
6.0
T
A
≤
85°C
−55
≤
T
A
≤
125°C
Min
Max
12.5
16.5
9.0
11.0
Max
Min
Max
Unit
ns
Maximum Output
Enable Time,
Input A or B to Y
V
CC
= 3.3
±
0.3 V C
L
= 15 pF
R
L
= R
I
= 500
W
C
L
= 50 pF
V
CC
= 5.0
±
0.5 V C
L
= 15 pF
R
L
= R
I
= 500
W
C
L
= 50 pF
V
CC
= 3.3
±
0.3 V C
L
= 50 pF
R
L
= R
I
= 500
W
V
CC
= 5.0
±
0.5 V C
L
= 50 pF
R
L
= R
I
= 500
W
8.8
12.3
5.9
7.9
10.5
14.0
7.0
9.0
t
PLZ
Maximum Output
Disable Time
12.3
7.9
10
14.0
9.0
10
16.5
11.0
10
ns
C
IN
Maximum Input Ca-
pacitance
pF
Typical @ 25°C, V
CC
= 5.0 V
18
C
PD
Power Dissipation Capacitance (Note 5)
pF
5. C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: I
CC(OPR
)
= C
PD
V
CC
f
in
+ I
CC
. C
PD
is used to determine the no−load dynamic
power consumption; P
D
= C
PD
V
CC2
f
in
+ I
CC
V
CC
.
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3
MC74VHC1G09
V
CC
A
B
OVT
V
CC
−
7 V
R
L
A or B
V
CC
50%
t
PZL
Y
50% V
CC
t
PLZ
GND
HIGH
IMPEDANCE
V
OL
+0.3 V
Figure 4. Output Voltage Mismatch Application
Figure 5. Switching Waveforms
V
CC
R
1
C
L
R
L
V
CC
x 2
PULSE
GENERATOR
R
T
DUT
C
L
= 50 pF equivalent (Includes jig and probe capacitance)
R
L
= R
1
= 500
W
or equivalent
R
T
= Z
OUT
of pulse generator (typically 50
W)
Figure 6. Test Circuit
V
CC
MC74VHC1G09
A
B
MC74VHC1G03
C
D
E = (A
•
B) + (C+D)
2.2 kW
B
A
1
2
3
4
5
V
CC
V
CC
MC74VHC1G09
3.3 V
1.5 V
220
W
GTL
R
LED
A
B
Figure 7. Complex Boolean Functions
Figure 8. LED Driver
Figure 9. GTL Driver
ORDERING INFORMATION
Device
MC74VHC1G09DFT1G
NLVVHC1G09DFT1G*
MC74VHC1G09DFT2G
NLVVHC1G09DFT2G*
MC74VHC1G09DTT1G
NLV74VHC1G09DTT1G*
SOT23−5 / TSOP−5 / SC59−5
(Pb−Free)
SC70−5 / SC−88A / SOT−353
(Pb−Free)
3000/Tape & Reel
Package
Shipping
†
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP
Capable.
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4
MC74VHC1G09
PACKAGE DIMENSIONS
SC−88A (SC−70−5/SOT−353)
CASE 419A−02
ISSUE L
A
G
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 419A−01 OBSOLETE. NEW STANDARD
419A−02.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
INCHES
MIN
MAX
0.071
0.087
0.045
0.053
0.031
0.043
0.004
0.012
0.026 BSC
---
0.004
0.004
0.010
0.004
0.012
0.008 REF
0.079
0.087
MILLIMETERS
MIN
MAX
1.80
2.20
1.15
1.35
0.80
1.10
0.10
0.30
0.65 BSC
---
0.10
0.10
0.25
0.10
0.30
0.20 REF
2.00
2.20
5
4
S
1
2
3
−B−
D
5 PL
0.2 (0.008)
M
B
M
N
J
C
DIM
A
B
C
D
G
H
J
K
N
S
H
K
SOLDERING FOOTPRINT*
0.50
0.0197
0.65
0.025
0.65
0.025
0.40
0.0157
1.9
0.0748
SCALE 20:1
mm
inches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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