EP3SL50F484I3LN datasheet, PDF

EP3SL50F484I3LN: DescriptionField Programmable Gate Array, 100MHz, 47500-Cell, CMOS, PBGA484; CategoryProgrammable logic devices Programmable logic; File Size4MB，502 Pages; ManufacturerAltera (Intel); Environmental Compliance

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EP3SL50F484I3LN Overview

Field Programmable Gate Array, 100MHz, 47500-Cell, CMOS, PBGA484

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Altera (Intel)
package instruction	BGA, BGA484,22X22,40
Reach Compliance Code	compliant
maximum clock frequency	100 MHz
JESD-30 code	S-PBGA-B484
JESD-609 code	e1
Number of entries	296
Number of logical units	47500
Output times	296
Number of terminals	484
Package body material	PLASTIC/EPOXY
encapsulated code	BGA
Encapsulate equivalent code	BGA484,22X22,40
Package shape	SQUARE
Package form	GRID ARRAY
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	1.2/3.3 V
Programmable logic type	FIELD PROGRAMMABLE GATE ARRAY
Certification status	Not Qualified
surface mount	YES
technology	CMOS
Terminal surface	Tin/Silver/Copper (Sn/Ag/Cu)
Terminal form	BALL
Terminal pitch	1 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED

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