IC VREG 3.6 V FIXED POSITIVE LDO REGULATOR, 0.415 V DROPOUT, PDSO5, POWER PACK, MLP33-5, Fixed Positive Single Output LDO Regulator
| Parameter Name | Attribute value |
| Is it lead-free? | Contains lead |
| Is it Rohs certified? | incompatible |
| Maker | Vishay |
| Parts packaging code | SOIC |
| package instruction | SON, FL8,.12,25 |
| Contacts | 5 |
| Reach Compliance Code | unknown |
| ECCN code | EAR99 |
| Adjustability | FIXED |
| Maximum drop-back voltage 1 | 0.415 V |
| Nominal dropback voltage 1 | 0.3 V |
| Maximum absolute input voltage | 6.5 V |
| Maximum input voltage | 6 V |
| Minimum input voltage | 2 V |
| JESD-30 code | R-PDSO-N5 |
| JESD-609 code | e0 |
| Maximum grid adjustment rate | 0.0108% |
| Number of functions | 1 |
| Output times | 1 |
| Number of terminals | 5 |
| Working temperatureTJ-Max | 125 °C |
| Working temperature TJ-Min | -40 °C |
| Maximum operating temperature | 85 °C |
| Minimum operating temperature | -40 °C |
| Maximum output current 1 | 0.3 A |
| Maximum output voltage 1 | 3.708 V |
| Minimum output voltage 1 | 3.492 V |
| Nominal output voltage 1 | 3.6 V |
| Package body material | PLASTIC/EPOXY |
| encapsulated code | SON |
| Encapsulate equivalent code | FL8,.12,25 |
| Package shape | RECTANGULAR |
| Package form | SMALL OUTLINE |
| method of packing | TAPE AND REEL |
| Peak Reflow Temperature (Celsius) | 240 |
| Certification status | Not Qualified |
| Regulator type | FIXED POSITIVE SINGLE OUTPUT LDO REGULATOR |
| surface mount | YES |
| technology | CMOS |
| Terminal surface | TIN LEAD |
| Terminal form | NO LEAD |
| Terminal pitch | 0.635 mm |
| Terminal location | DUAL |
| Maximum time at peak reflow temperature | 30 |
| Maximum voltage tolerance | 3% |
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