Data Sheet
PT7C4501/4501A
Frequency Multiplier
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Features
• Low cost frequency multiplier
• Zero ppm multiplication error
• Input crystal frequency of 5 - 30 MHz
• Input clock frequency of 4 - 50 MHz
• Output clock frequencies up to 180 MHz
• Low period jitter 50ps (100~180MHz)
• Duty cycle of 45/55%
• 9 selectable frequencies controlled by S0, S1 pins
• Operating voltages of 3.0 to 5.5V
• Tri-state output for board level testing
Description
The PT7C4501/4501A is a high performance
frequency multiplier, which integrates Analog Phase
Lock Loop techniques.
The PT7C4501/4501A is the most cost effective
way to generate a high quality, high frequency clock
output from a lower frequency crystal or clock input. It
is designed to replace crystal oscillators in most
electronic systems, clock multiplier and frequency
translation.
Using Phase-Locked-Loop (PLL) techniques, the
device uses a standard fundamental mode, inexpensive
crystal to produce output clocks up to 180 MHz.
The complex Logic divider is the ability to generate
nine different popular multiplication factors, allowing
one chip to output many common frequencies.
The device also has an Output Enable pin that tri-
states the clock output when the OE pin is taken low.
Ordering Information
Part No.
PT7C4501W
PT7C4501WE
PT7C4501AW
PT7C4501AWE
Package
SOIC-8
Lead free SOIC-8
SOIC-8
Lead free SOIC-8
This product is intended for clock generation and
frequency translation with low output jitter (variation in
the output period)
Applications
• Clock multiply and frequency translation
PT0139(07/05)
1
Ver:2
Data Sheet
PT7C4501/4501A
Frequency Multiplier
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Block Diagram
OE
S0
S1
PLL Clock Synthesis
and
Control Circuit
Output
Buffer
CLK
X1/ICLK
X2
Crystal
Oscillator
V
CC
GND
Pin Information
Pin Configration
PT7C4501/4501A
1
2
3
4
X1/ICLK
Vcc
GND
S1
X2
OE
S0
CLK
8
7
6
5
SOIC-8 package
Pin Description
Pin No.
Pin Name
Type
Description
1
X1/ICLK
I
Crystal connection or clock input.
2
V
CC
P
Supply voltage.
3
GND
P
Ground.
4
S1
I
Multiplier select pin 1. Connect to GND or VDD or float (no connection).
5
CLK
O
Clock output.
6
S0
I
Multiplier select pin 0. Connect to GND or VDD or float (no connection).
7
OE
I
Output Enable. Tri-states CLK output when low. Internal pull-up.
8
X2
O
Crystal connection. Leave unconnected for clock input.
Note:
XI/XO = crystal connections, TI = tri-level input, O = output, I = input, P = power supply connection
Clock Output Table
S1
0
0
0
M
M
S0
0
M
2)
1
0
M
CLK
×4
1)
×(16/3)
×5
×2.5
×2
S1
M
1
1
1
S0
1
0
M
1
CLK
×(10/3)
×6
×3
×8
Note 1:
CLK output frequency = ICLK
×
4.
Note 2:
M = leave unconnected (self-biases to Vcc/2).
PT0139(07/05)
2
Ver:2
Data Sheet
PT7C4501/4501A
Frequency Multiplier
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Common Output Frequencies Example (MHz)
Telecom Application
Output
16.384
Input
Selection (S1,S0)
8.192
M,M
32.768
16.384
M,M
30
10
1,M
38.88
19.44
M,M
51.2
25.6
M,M
37.5
15
M,0
32.768
8.192
0,0
52
13
0,0
60
10
1,0
Output
Input
Selection (S1,S0)
77.76
19.44
0,0
72
12
1,0
75
25
1,M
51.84
6.48
1,1
90
15
1,0
100
20
0,1
155.52
19.44
1,1
125
25
0,1
180
30
1,0
Output
Input
Selection (S1,S0)
20
10
M,M
24
12
M,M
30
10
1,M
32
16
M,M
33.33
16.66
M,M
37.5
15
M,0
40
10
0,0
48
12
0,0
60
10
1,0
Output
Input
64
16
72
12
75
25
80
10
90
15
100
20
120
15
125
25
0,1
150
25
1,0
Selection (S1,S0)
0,0
1,0
1,M
1,1
1,0
0,1
1,1
Note:
All of the above outputs are achieved by using a common, inexpensive 10MHz to 30MHz crystal.
Consult PTI on how to achieve other output frequencies.
Maximum Ratings
Storage Temperature .………………………………………….. -65oC to 150oC
Ambient Operation Temperature.………………………………-40oC to 85oC
Supply Voltage to Ground Potential (V
CC
) …. ………………................-0.3V to 7.0V
Inputs (Referenced to GND)....………………………….-0.5 to Vcc+0.5V
Clock Output (Referenced to GND)………………...-0.5 to Vcc+0.5V
Soldering Temperature (Max of 10 seconds)……………………260 oC
Note:
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the
device. This is a stress rating only and functional
operation of the device at these or any other condi-
tions above those indicated in the operational sec-
tions of this specification is not implied. Exposure
to absolute maximum rating conditions for extended
periods may affect reliability.
Recommended operation conditions
Sym
V
CC
T
A
Description
Supply voltage
Range of operating temperature
Min
3
-40
Type
-
-
Max
5.5
85
Unit
V
℃
PT0139(07/05)
3
Ver:2
Data Sheet
PT7C4501/4501A
Frequency Multiplier
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DC Electrical Characteristics
(V
CC
= 3.3V± 0.3V, T
A
= -40~85ºC, unless otherwise noted)
Sym
Vcc
Icc
V
IH
Parameter
Supply Voltage
Supply Current
Input Logic High
-
no load, 20MHz crystal
-
Test Condition
Pin
Vcc
Vcc
ICLK
OE
Input Logic Low
Input Logic High
Input Mid-level
Input Logic Low
High-level output voltage
Low-level output voltage
Internal pull up resistance
Short Circuit Current
-
-
-
-
I
OH
= -12mA
I
OL
= 12mA
-
-
-
ICLK
OE
S0, S1
S0, S1
S0, S1
CLK
CLK
OE
CLK
CLK
Min
3
-
(Vcc/2)+1
2
-
-
Vcc-0.5
-
-
2.4
-
-
-
-
Vcc/2
-
-
Vcc/2
-
-
-
270
±70
-
Typ
-
12
Vcc/2
Max
5.5
20
-
-
(Vcc/2)-1
0.8
-
-
0.5
-
0.4
-
-
1
Unit
V
mA
V
V
V
V
V
V
V
V
V
kΩ
mA
µA
V
IL
V
IH
V
IM
V
IL
V
OH
V
OL
R
I
S
I
OZ
Output Leakage Current
AC Electrical Characteristics
(V
CC
= 3.3V± 0.3V, T
A
= -40~85ºC, unless otherwise noted)
Sym
f
IN
Parameter
Input Frequency
Clock
V
CC
: 3.0 to 5.5V
f
OUT
t
r
t
f
Output frequency
V
CC
: 3.0 to 5.5V
Output clock rise time
Output clock fall time
0.8 to 2.0V, C
L
=15pF
2.0 to 0.8V, C
L
=15pF
At V
CC
/2
-
OE high to output on
OE low to tri-state
100MHz~180MHz
Period Jitter
100MHz~150MHz
100MH~180MHz,
Jitter over 200ns interval
100MH~150MHz
*
Test Condition
crystal
Pin
ICLK
ICLK
CLK(4501)
CLK(4501A)
CLK
CLK
CLK
-
-
-
CLK(4501)
CLK(4501A)
CLK(4501)
CLK(4501A)
Min
5
4
20
20
-
-
45
10
-
-
-
-
-
-
Typ
-
-
-
-
1
1
50
-
15
15
50
50
-
-
Max
30
50
Unit
MHz
180
150
-
-
55
-
50
50
100
ps
100
200
ps
200
ns
ns
%
kHz
ns
ns
Duty Output clock duty cycle
PLL bandwidth
*
Output enable time
Output disable time
Note:
Only reference for design.
PT0139(07/05)
4
Ver:2
Data Sheet
PT7C4501/4501A
Frequency Multiplier
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Mechanical Information
W/WE (8-pin SOIC)
.149
.157
3.78
3.99
.0099
.0196
0.25
0.50
x 45o
0-8o
.0075
.0098
0.19
0.25
.189
.196
4.80
5.00
0.40
1.27
.2284
.2440
5.80
6.20
.053
.068
1.35
1.75
SEATING PLANE
X.XX
X.XX
.016
.050
.016
.026
0.406
0.660
REF
.050
BSC
1.27
.013
.020
0.330
0.508
DENOTES DIMENSIONS
IN MILLIMETERS
.0040
.0098
0.10
0.25
Note:
1) Controlling dimensions in millimeters.
2) Ref: JDDEC MS-012 AA
PT0139(07/05)
5
Ver:2
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