parallel/serial microprocessor interface. It can be con-
figured in a continuous conversion mode to sequen-
tially digitize all four channels. The 28-pin ADS7825
is available in a plastic 0.3" DIP and in a SOIC, both
fully specified for operation over the industrial –40°C
to +85°C range.
Continuous Conversion
CONTC
40kΩ
AIN
0
Clock
20kΩ
40kΩ
AIN
1
8kΩ
Channel
A0
A1
R/C
CS
PWRD
Successive Approximation Register
and Control Logic
CDAC
BUSY
20kΩ
40kΩ
AIN
2
8kΩ
Serial
Comparator
Data
Out
SDATA
DATACLK
20kΩ
40kΩ
AIN
3
8kΩ
or
Parallel
Data
Out
8
D7-D0
BYTE
20kΩ
8kΩ
Buffer
CAP
6kΩ
REF
Internal
+2.5V Ref
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111
using external reference, CONTC = 0V, unless otherwise specified.
ADS7825P, U
PARAMETER
RESOLUTION
ANALOG INPUT
Voltage Range
Impedance
Capacitance
THROUGHPUT SPEED
Conversion Time
Acquisition Time
Multiplexer Settling Time
Complete Cycle (Acquire and Convert)
Complete Cycle (Acquire and Convert)
Throughput Rate
DC ACCURACY
Integral Linearity Error
No Missing Codes
Transition Noise
(3)
Full Scale Error
(4)
Full Scale Error Drift
Full Scale Error
(4)
Full Scale Error Drift
Bipolar Zero Error
Bipolar Zero Error Drift
Channel-to-Channel Mismatch
Power Supply Sensitivity
AC ACCURACY
Spurious-Free Dynamic Range
(5)
Total Harmonic Distortion
Signal-to-(Noise+Distortion)
Signal-to-Noise
Channel Separation
(6)
–3dB Bandwidth
Useable Bandwidth
(7)
SAMPLING DYNAMICS
Aperture Delay
Transient Response
(8)
Overvoltage Recovery
(9)
REFERENCE
Internal Reference Voltage
Internal Reference Source Current
(Must use external buffer)
External Reference Voltage Range
for Specified Linearity
External Reference Current Drain
DIGITAL INPUTS
Logic Levels
V
IL
V
IH
I
IL
I
IH
DIGITAL OUTPUTS
Data Format
Data Coding
V
OL
V
OH
Leakage Current
Output Capacitance
±10V
45.7
35
CONDITIONS
MIN
TYP
MAX
16
T
T
T
T
T
T
25
40
40
±3
15
0.8
Internal Reference
Internal Reference
±7
±2
±2
+4.75 < V
S
< +5.25
f
IN
=
f
IN
=
f
IN
=
f
IN
=
f
IN
=
1kHz
1kHz
1kHz
1kHz
1kHz
90
–90
83
83
100
86
86
T
±0.5
±0.5
±10
T
±0.1
±8
T
T
±0.1
T
16
T
±5
T
T
±0.25
±0.25
LSB
%
ppm/°C
%
ppm/°C
mV
ppm/°C
%
LSB
T
±2
T
T
MIN
ADS7825PB, UB
TYP
MAX
T
(1)
UNITS
Bits
Channel On or Off
V
kΩ
pF
µs
µs
µs
µs
µs
kHz
LSB
(2)
Includes Acquisition
CONTC = +5V
20
5
5
120
2
90
T
T
T
T
T
T
dB
dB
dB
dB
dB
MHz
kHz
FS Step
40
5
1
T
ns
µs
µs
T
V
µA
V
µA
2.48
2.5
1
2.5
2.52
T
T
T
2.3
V
REF
= +2.5V
2.7
100
T
T
T
–0.3
+2.4
+0.8
V
S
+0.3V
±10
±10
T
T
T
T
T
T
T
T
T
V
V
µA
µA
I
SINK
= 1.6mA
I
SOURCE
= 500µA
High-Z State, V
OUT
= 0V to V
S
High-Z State
Parallel in two bytes; Serial
Binary Two's Complement
+0.4
+4
±5
15
T
T
T
V
V
µA
pF
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN
assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject
to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not
authorize or warrant any BURR-BROWN product for use in life support devices and/or systems.
®
ADS7825
2
SPECIFICATIONS
(CONT)
ELECTRICAL
At T
A
= –40°C to +85°C, f
S
= 40kHz, V
S1
= V
S2
= V
S
= +5V
±5%,
using external reference, CONTC = 0V, unless otherwise specified.
ADS7825P, U
PARAMETER
DIGITAL TIMING
Bus Access Time
Bus Relinquish Time
Data Clock
Internal Clock (Output only when
transmitting data)
External Clock
POWER SUPPLIES
V
S1
= V
S2
= V
S
Power Dissipation
TEMPERATURE RANGE
Specified Performance
Storage
Thermal Resistance (
θ
JA
)
Plastic DIP
SOIC
CONDITIONS
PAR/SER = +5V
PAR/SER = +5V
PAR/SER = 0V
EXT/INT LOW
EXT/INT HIGH
MIN
TYP
MAX
83
83
0.5
0.1
+4.75
f
S
= 40kHz
PWRD HIGH
–40
–65
75
75
+5
50
+85
+150
T
T
T
T
1.5
10
+5.25
50
T
T
T
T
T
T
T
MIN
ADS7825PB, UB
TYP
MAX
T
T
T
T
T
T
UNITS
ns
ns
MHz
MHz
V
mW
µW
°C
°C
°C/W
°C/W
NOTES: (1) An asterik (T) specifies same value as grade to the left. (2) LSB means Least Significant Bit. For the 16-bit,
±10V
input ADS7825, one LSB is 305µV. (3)
Typical rms noise at worst case transitions and temperatures. (4) Full scale error is the worst case of –Full Scale or +Full Scale untrimmed deviation from ideal first and
last code transitions, divided by the transition voltage (not divided by the full-scale range) and includes the effect of offset error. (5) All specifications in dB are referred
to a full-scale
±10V
input. (6) A full scale sinewave input on one channel will be attenuated by this amount on the other channels. (7) Useable Bandwidth defined as
Full-Scale input frequency at which Signal-to-(Noise+Distortion) degrades to 60dB, or 10 bits of accuracy. (8) The ADS7825 will accurately acquire any input step if given
a full acquisition period after the step. (9) Recovers to specified performance after 2 x FS input overvoltage, and normal acquisitions can begin.
PACKAGE/ORDERING INFORMATION
PACKAGE
DRAWING
NUMBER
(1)
246
246
217
217
TEMPERATURE
RANGE
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
MAXIMUM INTEGRAL
LINEARITY ERROR (LSB)
±3
±2
±3
±2
MINIMUM SIGNAL-
TO-(NOISE + DISTORTION)
RATIO (dB)
83
86
83
86
PRODUCT
ADS7825P
ADS7825PB
ADS7825U
ADS7825UB
PACKAGE
Plastic Dip
Plastic Dip
SOIC
SOIC
NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book.
ABSOLUTE MAXIMUM RATINGS
Analog Inputs: AIN
0
, AIN
1
, AIN
2
, AIN
3
..............................................
±15V
REF ................................... (AGND2 –0.3V) to (V
S
+ 0.3V)
CAP ........................................ Indefinite Short to AGND2,
Momentary Short to V
S
V
S1
and V
S2
to AGND2 ........................................................................... 7V
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