SN74LS73ANE4 datasheet, PDF - EEWORLD Datasheet

SN74LS73ANE4: DescriptionJ-K Flip-Flop, LS Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, TTL, PDIP14, ROHS COMPLIANT, PLASTIC, DIP-14; Categorylogic logic; File Size1MB，10 Pages; ManufacturerRochester Electronics; Websitehttps://www.rocelec.com/

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J-K Flip-Flop, LS Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, TTL, PDIP14, ROHS COMPLIANT, PLASTIC, DIP-14

Parameter Name	Attribute value
Maker	Rochester Electronics
package instruction	DIP,
Reach Compliance Code	unknown
series	LS
JESD-30 code	R-PDIP-T14
JESD-609 code	e4
length	19.305 mm
Logic integrated circuit type	J-K FLIP-FLOP
Number of digits	2
Number of functions	2
Number of terminals	14
Maximum operating temperature	70 °C
Minimum operating temperature
Output characteristics	TOTEM POLE
Output polarity	COMPLEMENTARY
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Package shape	RECTANGULAR
Package form	IN-LINE
propagation delay (tpd)	20 ns
Maximum seat height	5.08 mm
Maximum supply voltage (Vsup)	5.25 V
Minimum supply voltage (Vsup)	4.75 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	TTL
Temperature level	COMMERCIAL
Terminal surface	NICKEL PALLADIUM GOLD
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Trigger type	NEGATIVE EDGE
width	7.62 mm
minfmax	30 MHz

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