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DPS128X8CA3-45I

Description
SRAM Module, 128KX8, 45ns, CMOS, CPGA50, CERAMIC, MODULE, SLCC, PGA-50
Categorystorage    storage   
File Size811KB,10 Pages
ManufacturerB&B Electronics Manufacturing Company
Download Datasheet Parametric View All

DPS128X8CA3-45I Overview

SRAM Module, 128KX8, 45ns, CMOS, CPGA50, CERAMIC, MODULE, SLCC, PGA-50

DPS128X8CA3-45I Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerB&B Electronics Manufacturing Company
Parts packaging codePGA
package instructionAPGA, PGA50,5X10
Contacts50
Reach Compliance Codeunknown
ECCN codeEAR99
Maximum access time45 ns
I/O typeCOMMON
JESD-30 codeR-CPGA-P50
JESD-609 codee0
length25.146 mm
memory density1048576 bit
Memory IC TypeSRAM MODULE
memory width8
Number of functions1
Number of ports1
Number of terminals50
word count131072 words
character code128000
Operating modeASYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize128KX8
Output characteristics3-STATE
ExportableYES
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeAPGA
Encapsulate equivalent codePGA50,5X10
Package shapeRECTANGULAR
Package formGRID ARRAY, PIGGYBACK
Parallel/SerialPARALLEL
power supply5 V
Certification statusNot Qualified
Maximum seat height5.207 mm
Maximum standby current0.0004 A
Minimum standby current2 V
Maximum slew rate0.14 mA
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formPIN/PEG
Terminal pitch2.54 mm
Terminal locationPERPENDICULAR
width13.716 mm
1 Megabit High Speed CMOS SRAM
DPS128M8CnY/BnY, DPS128X8CA3/BA3
DESCRIPTION:
The DPS128M8CnY/BnY, DPS128X8CA3/BA3 High Speed SRAM
devices are a revolutionary new memory subsystem using Dense-Pac
Microsystems’ ceramic Stackable Leadless Chip Carriers (SLCC).
Available in straight leaded, ‘’J’’ leaded or gullwing leaded packages,
or mounted on a 50-pin PGA co-fired ceramic substrate. These devices
pack 1-Megabits of low-power CMOS static RAM in an area as small
as 0.463 in
2
, while maintaining a total height as low as 0.082 inches.
The SLCC devices contain an individual 128K x 8 SRAMs, each
packaged in a hermetically sealed SLCC, making the modules suitable
for commercial, industrial and military applications.
The DPS128M8BnY/DPS128X8BA3 has one active low Chip Enable
(CE) while the DPS128M8CnY/DPS128X8CA3 has an active low Chip
Enable (CE) and an active high Select Line (SEL).
By using SLCCs, the ‘’Stack’’ family of modules offer a higher board
density of memory than available with conventional through-hole,
surface mount or hybrid techniques.
SLCC
‘’I’’ Leaded
SLCC
FEATURES:
Organization Available: 128Kx8
Access Times: 20*, 25, 30, 35, 45ns
Fully Static Operation - No clock or refresh required
Single +5V Power Supply,
±
10% Tolerance
TTL Compatible
Common Data Inputs and Outputs
Low Data Retention Voltage: 2.0V min.
Packages Available:
48 - Pin SLCC
48 - Pin Straight Leaded SLCC
48 - Pin ‘’J’’ Leaded SLCC
48 - Pin Gullwing Leaded SLCC
50 - Pin PGA Dense-Stack
‘’J’’ Leaded
SLCC
*
Commercial only.
Dense-Stack
Gullwing
Leaded SLCC
30A097-31
REV. D
This document contains information on a product that is currently released
to production at Dense-Pac Microsystems, Inc. Dense-Pac reserves the
right to change products or specifications herein without prior notice.
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