ICS1887M datasheet, PDF - EEWORLD Datasheet

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ICS1887M: DescriptionTelecom Circuit, 1-Func, CMOS, PDSO28, SOIC-28; CategoryWireless rf/communication Telecom circuit; File Size533KB，14 Pages; ManufacturerIDT (Integrated Device Technology)

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ICS1887M Overview

Telecom Circuit, 1-Func, CMOS, PDSO28, SOIC-28

ICS1887M Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	IDT (Integrated Device Technology)
Parts packaging code	SOIC
package instruction	SOP,
Contacts	28
Reach Compliance Code	compliant
JESD-30 code	R-PDSO-G28
JESD-609 code	e0
length	17.8816 mm
Number of functions	1
Number of terminals	28
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	225
Certification status	Not Qualified
Maximum seat height	2.8194 mm
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Telecom integrated circuit types	TELECOM CIRCUIT
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	7.5184 mm

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Integrated

Circuit

Systems, Inc.

ICS1887

FDDI / Fast Ethernet PHYceiver

General Description

The

ICS1887

is designed to provide high performance clock

recovery and generation for 125 MHz serial data streams. The

ICS1887 is ideally suited for LAN transceiver applications in

either FDDI or Fast Ethernet environments. The

ICS1887

converts NRZ to/from NRZI data in addition to providing a

5-bit parallel digital data transmit and receive interface.

Clock and data recovery is performed on an input serial data

stream or the buffered transmit data depending upon the state

of the loopback input. A continuous clock source will

continue to be present even in the absence of input data.

All internal timing is derived from either a low cost crystal,

differential or single-ended source.

The

ICS1887

utilizes advanced CMOS phase-locked loop

technology which combines high performance and low power

at a greatly reduced cost.

Features

•

Single IC solution to existing designs requiring

multiple devices

Data and clock recovery for 125 MBaud FDDI or Fast

Ethernet applications

Clock multiplication from either a crystal, differential

or single-ended timing source

Continuous clock in the absence of data

No external PLL components

Lock/Loss status indicator output

Loopback mode for system diagnostics

Selectable loop timing mode

PECL driver with settable sink current

Parallel digital transmit and receive data interface

NRZ to/from NRZI data conversion

Consult ICS for optional configurations and data rates

Block Diagram

Pin Configuration

28-Pin SOIC

PHYceiver is a trademark of Integrated Circuit Systems, Inc.

ICS1887RevF112596

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Shortcut: L0 L1 L2 L3 L4 L5 L6 L7 L8 L9 LA LB LC LD LE LF LG LH LI LJ LK LL LM LN LO LP LQ LR LS LT LU LV LW LX LY LZ M0 M1 M2 M3 M4 M5 M6 M7 M8 M9 MA MB MC MD ME MF MG MH MI MJ MK ML MM MN MO MP MQ MR MS MT MU MV MW MX MY MZ N0 N1 N2 N3 N4 N5 N6 N7 N8 NA NB NC ND NE NF NG NH NI NJ NK NL NM NN NO NP NQ NR NS NT NU NV NX NZ O0 O1 O2 O3 OA OB OC OD OE OF OG OH OI OJ OK OL OM ON OP OQ OR OS OT OV OX OY OZ P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 PA PB PC PD PE PF PG PH PI PJ PK PL PM PN PO PP PQ PR PS PT PU PV PW PX PY PZ Q1 Q2 Q3 Q4 Q5 Q6 Q8 Q9 QA QB QC QE QF QG QH QK QL QM QP QR QS QT QV QW QX QY R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 RA RB RC RD RE RF RG RH RI RJ RK RL RM RN RO RP RQ RR RS RT RU RV RW RX RY RZ

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