Hitachi 16-Bit Single-Chip Microcomputer
H8S/2214, H8S/2214 F-ZTAT™
Hardware Manual
ADE-602-213A
Rev. 2.0
7/26/01
Hitachi Ltd.
Cautions
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patent, copyright, trademark, or other intellectual property rights for information contained in
this document. Hitachi bears no responsibility for problems that may arise with third party’s
rights, including intellectual property rights, in connection with use of the information
contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you
have received the latest product standards or specifications before final design, purchase or
use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability.
However, contact Hitachi’s sales office before using the product in an application that
demands especially high quality and reliability or where its failure or malfunction may directly
threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear
power, combustion control, transportation, traffic, safety equipment or medical equipment for
life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi
particularly for maximum rating, operating supply voltage range, heat radiation characteristics,
installation conditions and other characteristics. Hitachi bears no responsibility for failure or
damage when used beyond the guaranteed ranges. Even within the guaranteed ranges,
consider normally foreseeable failure rates or failure modes in semiconductor devices and
employ systemic measures such as fail-safes, so that the equipment incorporating Hitachi
product does not cause bodily injury, fire or other consequential damage due to operation of
the Hitachi product.
5. This product is not designed to be radiation resistant.
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without written approval from Hitachi.
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semiconductor products.
Preface
This LSI is a single-chip microcomputer made up of the H8S/2000 CPU with an internal 32-bit
architecture as its core, and the peripheral functions required to configure a system.
This LSI is equipped with ROM, RAM, a bus controller, data transfer controller (DTC), a DMA
controller (DMAC), two types of timers, a serial communication interface (SCI), a D/A converter,
an A/D converter, and I/O ports as on-chip supporting modules. This LSI is suitable for use as an
embedded processor for high-level control systems. Its on-chip ROM are flash memory (F-
ZTAT™*) and mask ROM that provides flexibility as it can be reprogrammed in no time to cope
with all situations from the early stages of mass production to full-scale mass production. This is
particularly applicable to application devices with specifications that will most probably change.
Note: * F-ZTAT™ is a trademark of Hitachi, Ltd.
Target Users: This manual was written for users who will be using the H8S/2214, H8S/2214F-
ZTAT™ in the design of application systems. Members of this audience are
expected to understand the fundamentals of electrical circuits, logical circuits, and
microcomputers.
Objective:
This manual was written to explain the hardware functions and electrical
characteristics of the H8S/2214, H8S/2214F-ZTAT™ to the above audience. Refer
to the H8S/2600 Series, H8S/2000 Series Programming Manual for a detailed
description of the instruction set.
Notes on reading this manual:
•
In order to understand the overall functions of the chip
Read the manual according to the contents. This manual can be roughly categorized into parts
on the CPU, system control functions, peripheral functions and electrical characteristics.
•
In order to understand the details of the CPU's functions
Read the H8S/2600 Series, H8S/2000 Series Programming Manual.
•
In order to understand the details of a register when its name is known
The addresses, bits, and initial values of the registers are summarized in Appendix B, Internal
I/O Registers.
Example:
Bit order:
The MSB is on the left and the LSB is on the right.
Related Manuals:
The latest versions of all related manuals are available from our web site.
Please ensure you have the latest versions of all documents you require.
http://www.hitachi.co.jp/Sicd/English/Products/micome.htm
H8S/2214, H8S/2214F-ZTAT™ manuals:
Manual Title
H8S/2214, H8S/2214F-ZTAT™ Hardware Manual
H8S/2600 Series, H8S/2000 Series Programming Manual
ADE No.
This manual
ADE-602-083
Users manuals for development tools:
Manual Title
C/C++ Complier, Assembler, Optimized Linkage Editor User's Manual
Simulator Debugger (for Windows) Users Manual
Hitachi Embedded Workshop Users Manual
ADE No.
ADE-702-247
ADE-702-037
ADE-702-201
Application Notes:
Manual Title
H8S Series Technical Q & A
ADE No.
ADE-502-059
List of Items Revised or Added for This Version
Section
Section 1
Overview
1.1
Title
Overview
Page
2
Revisions
(See Manual for Details)
Table 1-1 Overview
Description of DMA Controller
(DMAC) amended.
Figure 1-1 H8S/2214 Internal Block
Diagram amended.
Figure 1-2 H8S/2214 Pin
Arrangement (TFP-100B, TFP-
100G: Top View) amended.
Table 1-2 Pin Functions in Each
Operating Mode
Mode of pin Nos. 34 and 35 revised
from 4 to 7.
Table 1-3 Pin Functions.
Description of DMA Controller
(DMAC) amended.
Description of Short Address Mode
amended.
Figure 7-1 Block Diagram of DMAC
amended.
Table 7-1 Overview of DMAC
Functions (Short Address Mode)
Description of Single Address Mode
deleted.
Description of Pin Configuration
amended.
Table 7-3 DMAC Pins amended.
7.2.4
DMA Control Register
(DMACR)
DMA Band Control
Register (DMABCR)
173
Description of Bit 4: Data Transfer
Direction (DTDIR) amended, and
Table amended.
DMABCRH of Bits 13 and 12
changed to "—."
Bits 13 and 12—Reserved bits.
Description of 12 and 13 grouped
together.
7.3.5
DMA Band Control
Register (DMABCR)
189
Revised as follows:
Bits 10 and 8—Reserved (DTA1A,
DTA0A): Reserved bits in full
address mode. Read and write
possible.
1.2
1.3.1
Internal Block Diagrams 5
Pin Arrangements
6
1.3.2
Pin Functions in Each
Operating Mode
9
1.3.3
Pin Functions
14
Section 7
DMA
Controller
7.1.1
7.1.2
7.1.3
Features
Block Diagram
Overview of Functions
163
164
165
7.1.4
Pin Configuration
167
7.2.5
176