Standard SRAM, 128KX8, 55ns, CDIP32, 0.600 INCH, SIDE BRAZED, CERAMIC, DIP-32
Parameter Name | Attribute value |
Maker | IDT (Integrated Device Technology) |
Parts packaging code | DIP |
package instruction | DIP, |
Contacts | 32 |
Reach Compliance Code | compliant |
ECCN code | 3A001.A.2.C |
Maximum access time | 55 ns |
Other features | TTL COMPATIBLE INPUTS/OUTPUTS |
JESD-30 code | R-CDIP-T32 |
JESD-609 code | e0 |
length | 40.894 mm |
memory density | 1048576 bit |
Memory IC Type | STANDARD SRAM |
memory width | 8 |
Number of functions | 1 |
Number of terminals | 32 |
word count | 131072 words |
character code | 128000 |
Operating mode | ASYNCHRONOUS |
Maximum operating temperature | 125 °C |
Minimum operating temperature | -55 °C |
organize | 128KX8 |
Package body material | CERAMIC, METAL-SEALED COFIRED |
encapsulated code | DIP |
Package shape | RECTANGULAR |
Package form | IN-LINE |
Parallel/Serial | PARALLEL |
Certification status | Not Qualified |
Maximum seat height | 4.826 mm |
Maximum supply voltage (Vsup) | 5.5 V |
Minimum supply voltage (Vsup) | 4.5 V |
Nominal supply voltage (Vsup) | 5 V |
surface mount | NO |
technology | CMOS |
Temperature level | MILITARY |
Terminal surface | TIN LEAD |
Terminal form | THROUGH-HOLE |
Terminal pitch | 2.54 mm |
Terminal location | DUAL |
width | 15.24 mm |