2N682, 2N683, and 2N685 – 2N692
PNPN Silicon, Reverse-Blocking,
Power Triode Thyristors
Qualified per MIL-PRF-19500/108
DESCRIPTION
This silicon controlled rectifier device is military qualified up to a JANTX level for high-reliability
applications.
Available on
commercial
versions
Qualified Levels:
JAN and JANTX
Important:
For the latest information, visit our website
http://www.microsemi.com.
FEATURES
•
•
•
JEDEC registered 2N682, 2N683, 2N685, and 2N687 – 2N692.
JAN and JANTX qualifications are available per MIL-PRF-19500/108.
RoHS compliant versions available (commercial grade only).
TO-208 / TO-48
Package
APPLICATIONS / BENEFITS
•
A general purpose, reverse-blocking thyristor.
MAXIMUM RATINGS
Parameters/Test Conditions
Junction Temperature
Storage Temperature
Gate Voltage (Peak Total Value)
(1)
Maximum Average DC Output Current
(2)
Non-repetitive Peak On-State Current @ t = 7 ms
Notes:
Symbol
T
J
T
STG
V
GM
I
O
I
TSM
Value
-65 to +125
-65 to +150
5
16
150
Unit
o
C
o
C
V(pk)
A
A
1. This average forward current is for a maximum case temperature of +65 °C, and 180 electrical degrees
of conduction.
2. Surge rating is non-recurrent and applies only with device in the conducting state. The peak rate of surge
current must not exceed 100 amperes during the first 10 μs after switching from the off (blocking) state
to the on (conducting) state. This time is measured from the point where the thyristor voltage has
decayed to 90 percent of its initial blocking value.
MSC – Lawrence
6 Lake Street,
Lawrence, MA 01841
Tel: 1-800-446-1158 or
(978) 620-2600
Fax: (978) 689-0803
MSC – Ireland
Gort Road Business Park,
Ennis, Co. Clare, Ireland
Tel: +353 (0) 65 6840044
Fax: +353 (0) 65 6822298
Website:
www.microsemi.com
T4-LDS-0249, Rev. 2 (4/25/13)
©2013 Microsemi Corporation
Page 1 of 6
2N682, 2N683, and 2N685 – 2N692
MECHANICAL and PACKAGING
•
•
•
•
•
•
CASE: Nickel plated copper.
TERMINALS: Nickel plated steel, solder dipped or RoHS compliant matte-tin plating (on commercial and CDS grade only).
MARKING: Manufacturer’s ID, part number, date code, polarity.
POLARITY: Terminal 1: gate, terminal 2: cathode, terminal 3 (stud): anode.
WEIGHT: Approximately 12.36 grams.
See
Package Dimensions
on last page.
PART NOMENCLATURE
JAN
Reliability Level
JAN = Jan level
JANTX = JANTX level
CDS (reference JANS)
Blank = Commercial
JEDEC type number
(See
Electrical Characteristics
table)
2N682
(e3)
RoHS Compliance
e3 = RoHS compliant (available
on commercial grade only)
Blank = non-RoHS compliant
Symbol
C
di/dt
dv/dt
f
I
F
I
T
I
TM
R
R
e
R
L
t
tp
V
AA
SYMBOLS & DEFINITIONS
Definition
Capacitance
Critical rate of rise of on-state current
Critical rate of rise of off-state voltage
frequency
Forward current
On-state current
On-state current (peak total value)
Resistance
Responsivity, radiant
Resistor load
time
Pulse variation
Anode power supply voltage (dc)
T4-LDS-0249, Rev. 2 (4/25/13)
©2013 Microsemi Corporation
Page 2 of 6
2N682, 2N683, and 2N685 – 2N692
ELECTRICAL CHARACTERISTICS
Parameters / Test Conditions
Symbol
Min.
Max.
Unit
V (pk)
2N682
2N683
2N685
2N686
2N687
2N688
2N689
2N690
2N691
2N692
(1)
Values applicable to zero or negative gate voltage (V
GM
).
Repetitive Peak Reverse Voltage
and
Repetitive Peak Off-State Voltage
V
RRM
and
V
DRM
(1)
50
100
200
250
300
400
500
600
700
800
Parameters / Test Conditions
Symbol
Min.
Max.
Unit
Holding current:
Bias condition D; V
AA
= 24 V maximum;
I
TM
= I
F1
= 1 A
I
T
= I
F2
= 100 mA
trigger voltage source = 10 V
trigger PW = 100 μs (minimum)
R
2
= 20 Ω
Reverse blocking current
AC method, bias condition D;
f = 60 Hz, V
RRM
= rated
Forward blocking current
AC method, bias condition D;
f = 60 Hz; V
DRM
= rated
Gate trigger voltage and current
V
2
= V
D
= 6 V; R
L
= 50 Ω;
R
e
= 20 Ω maximum
Forward on voltage
I
TM
= 50 A(pk) (pulse);
pulse width = 8.5 ms; maximum;
duty cycle = 2 percent maximum
Reverse gate current
V
G
= 5 V
I
H
50
mA
I
RRM1
2
mA (pk)
I
DRM1
2
mA (pk)
V
GT1
I
GT1
V
TM
3
35
2
V
mA
V (pk)
I
G
250
mA
T4-LDS-0249, Rev. 2 (4/25/13)
©2013 Microsemi Corporation
Page 3 of 6
2N682, 2N683, and 2N685 – 2N692
ELECTRICAL CHARACTERISTICS (continued)
Parameters / Test Conditions
Symbol
Min.
Max.
Unit
Reverse blocking current (
T
C
= +120 ºC
)
AC method, bias condition D;
f = 60 Hz; V
RRM
= rated
Forward blocking current (
T
C
= +120 ºC
)
AC method, bias condition D;
f = 60 Hz; V
DRM
= rated
Gate trigger voltage (
T
C
= +120 ºC; R
e
= 20 Ω max
)
V
2
= V
DM
= 50 V; R
L
= 140 Ω
V
2
= V
DM
= 100 V; R
L
= 140 Ω
V
2
= V
DM
= 200 V; R
L
= 140 Ω
V
2
= V
DM
= 250 V; R
L
= 650 Ω
V
2
= V
DM
= 300 V; R
L
= 650 Ω
V
2
= V
DM
= 400 V; R
L
= 3 k Ω
V
2
= V
DM
= 500 V; R
L
= 3 k Ω
V
2
= V
DM
= 600 V; R
L
= 3 k Ω
V
2
= V
DM
= 700 V; R
L
= 3 k Ω
V
2
= V
DM
= 800 V; R
L
= 3 k Ω
Reverse blocking current (
T
C
= -65 ºC
)
AC method, bias condition D;
f = 60 Hz; V
RRM
= rated
Forward blocking current (
T
C
= -65 ºC
)
AC method, bias condition D;
f = 60 Hz; V
DRM
= rated
Gate trigger voltage and current (
T
C
= -65 ºC
)
V
2
= V
D
= 6 V; R
L
= 50 Ω;
R
e
= 20 Ω maximum
Exponential rate of voltage rise
Bias condition D; T
C
= +120°C minimum,
dv/dt = 25 v/μs; repetition rate = 60 pps;
test duration = 15 s;
C = 1.0 μF; R
L
= 50 Ω
V
AA
= 50 V
V
AA
= 100 V
V
AA
= 200 V
V
AA
= 250 V
V
AA
= 300 V
V
AA
= 400 V
V
AA
= 500 V
V
AA
= 600 V
V
AA
= 700 V
V
AA
= 800 V
2N682
2N683
2N685
2N686
2N687
2N688
2N689
2N690
2N691
2N692
I
RRM2
5
mA (pk)
I
DRM2
5
mA (pk)
V
GT2
.25
V
I
RRM3
2
mA (pk)
I
DRM3
V
GT3
I
GT2
2
3
80
mA (pk)
V
mA
2N682
2N683
2N685
2N686
2N687
2N688
2N689
2N690
2N691
2N692
V
D
47
95
190
240
285
380
475
570
665
760
V
T4-LDS-0249, Rev. 2 (4/25/13)
©2013 Microsemi Corporation
Page 4 of 6
2N682, 2N683, and 2N685 – 2N692
ELECTRICAL CHARACTERISTICS (continued)
Parameters / Test Conditions
Circuit-commutated turn-off time
T
C
= +120°C minimum; I
TM
= 10 A;
t
on
= 100 ±50 μs; di/dt = 5 A/μs minimum;
di/dt = 8 A/μs maximum; reverse voltage at t
1
= 15 V minimum;
repetition rate = 60 pps maximum; di/dt = 20 V/μs;
gate bias conditions; gate source voltage = 0 V;
gate source resistance = 100 Ω
V
DM
= V
DRM
= 50 V (pk); V
RRM
= 50 V maximum
2N682
V
DM
= V
DRM
= 100 V (pk); V
RRM
= 100 V maximum
2N683
V
DM
= V
DRM
= 200 V (pk); V
RRM
= 200 V maximum
2N685
V
DM
= V
DRM
= 250 V (pk); V
RRM
= 250 V maximum
2N686
V
DM
= V
DRM
= 300 V (pk); V
RRM
= 300 V maximum
2N687
V
DM
= V
DRM
= 400 V (pk); V
RRM
= 400 V maximum
2N688
V
DM
= V
DRM
= 500 V (pk); V
RRM
= 500 V maximum
2N689
V
DM
= V
DRM
= 600 V (pk); V
RRM
= 600 V maximum
2N690
V
DM
= V
DRM
= 700 V (pk); V
RRM
= 700 V maximum
2N691
V
DM
= V
DRM
= 800 V (pk); V
RRM
= 800 V maximum
2N692
Gate controlled turn-on time
V
AA
= 50 V for 2N682
V
AA
= 100 V for 2N683, 2N685 through 2N692
I
TM
= 10 A; V
GG
= 10 V; R
e
= 25 Ω
t
p1
= 15 ±5 μs; 4 A/μs ≤ di/dt ≤ 200 A/μs.
2N682,
2N683,
2N685
through
2N692
Symbol
Min.
Max.
Unit
t
off
30
30
30
30
30
30
40
40
60
60
5
µs
t
on
µs
T4-LDS-0249, Rev. 2 (4/25/13)
©2013 Microsemi Corporation
Page 5 of 6
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