NS32AM162V-20 datasheet, PDF - EEWORLD Datasheet

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NS32AM162V-20: DescriptionIC 16-BIT, 40.96 MHz, OTHER DSP, PQCC68, PLASTIC, LCC-68, Digital Signal Processor; CategoryThe embedded processor and controller Microcontrollers and processors; File Size746KB，80 Pages; ManufacturerNational Semiconductor（TI ）; Websitehttp://www.ti.com

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NS32AM162V-20 Overview

IC 16-BIT, 40.96 MHz, OTHER DSP, PQCC68, PLASTIC, LCC-68, Digital Signal Processor

NS32AM162V-20 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	National Semiconductor（TI ）
package instruction	QCCJ,
Reach Compliance Code	unknown
ECCN code	3A001.A.3
Address bus width	18
boundary scan	NO
maximum clock frequency	40.96 MHz
External data bus width	16
Format	FIXED POINT
Integrated cache	NO
Internal bus architecture	SINGLE
JESD-30 code	S-PQCC-J68
JESD-609 code	e0
length	24.13 mm
low power mode	YES
Number of DMA channels
Number of external interrupt devices	1
Number of serial I/Os
Number of terminals	68
Number of timers	1
On-chip data RAM width	8
On-chip program ROM width	8
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	PLASTIC/EPOXY
encapsulated code	QCCJ
Package shape	SQUARE
Package form	CHIP CARRIER
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Certification status	Not Qualified
RAM (number of words)	1075.2
ROM programmability	MROM
Maximum seat height	4.57 mm
Maximum slew rate	200 mA
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	24.13 mm
uPs/uCs/peripheral integrated circuit type	DIGITAL SIGNAL PROCESSOR, OTHER

NS32AM162V-20 Related Products

	NS32AM162V-20	NS32AM163V-20
Description	IC 16-BIT, 40.96 MHz, OTHER DSP, PQCC68, PLASTIC, LCC-68, Digital Signal Processor	IC 16-BIT, 40.96 MHz, OTHER DSP, PQCC68, PLASTIC, LCC-68, Digital Signal Processor
Is it Rohs certified?	incompatible	incompatible
Maker	National Semiconductor（TI ）	National Semiconductor（TI ）
package instruction	QCCJ,	QCCJ,
Reach Compliance Code	unknown	unknown
ECCN code	3A001.A.3	3A001.A.3
Address bus width	18	18
boundary scan	NO	NO
maximum clock frequency	40.96 MHz	40.96 MHz
External data bus width	16	16
Format	FIXED POINT	FIXED POINT
Integrated cache	NO	NO
Internal bus architecture	SINGLE	SINGLE
JESD-30 code	S-PQCC-J68	S-PQCC-J68
JESD-609 code	e0	e0
length	24.13 mm	24.13 mm
low power mode	YES	YES
Number of external interrupt devices	1	1
Number of terminals	68	68
Number of timers	1	1
On-chip data RAM width	8	8
On-chip program ROM width	8	8
Maximum operating temperature	70 °C	70 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	QCCJ	QCCJ
Package shape	SQUARE	SQUARE
Package form	CHIP CARRIER	CHIP CARRIER
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED
Certification status	Not Qualified	Not Qualified
RAM (number of words)	1075.2	1075.2
ROM programmability	MROM	MROM
Maximum seat height	4.57 mm	4.57 mm
Maximum slew rate	200 mA	200 mA
Maximum supply voltage	5.5 V	5.5 V
Minimum supply voltage	4.5 V	4.5 V
Nominal supply voltage	5 V	5 V
surface mount	YES	YES
technology	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	J BEND	J BEND
Terminal pitch	1.27 mm	1.27 mm
Terminal location	QUAD	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED
width	24.13 mm	24.13 mm
uPs/uCs/peripheral integrated circuit type	DIGITAL SIGNAL PROCESSOR, OTHER	DIGITAL SIGNAL PROCESSOR, OTHER

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