MBM29F400TC-70PF-E1 datasheet, PDF

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MBM29F400TC-70PF-E1: DescriptionFlash, 256KX16, 70ns, PDSO44, PLASTIC, SOP-44; Categorystorage storage; File Size566KB，48 Pages; ManufacturerSPANSION; Websitehttp://www.spansion.com/; Environmental Compliance

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MBM29F400TC-70PF-E1 Overview

Flash, 256KX16, 70ns, PDSO44, PLASTIC, SOP-44

MBM29F400TC-70PF-E1 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	SPANSION
Parts packaging code	SOIC
package instruction	SOP,
Contacts	44
Reach Compliance Code	compliant
ECCN code	EAR99
Maximum access time	70 ns
Spare memory width	8
startup block	TOP
JESD-30 code	R-PDSO-G44
JESD-609 code	e3
length	28.45 mm
memory density	4194304 bit
Memory IC Type	FLASH
memory width	16
Number of functions	1
Number of terminals	44
word count	262144 words
character code	256000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	256KX16
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	260
Programming voltage	5 V
Certification status	Not Qualified
Maximum seat height	2.5 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	MATTE TIN
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	40
type	NOR TYPE
width	13 mm

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SPANSION Flash Memory

Data Sheet

September 2003

This document specifies SPANSION memory products that are now offered by both Advanced Micro Devices and

Fujitsu. Although the document is marked with the name of the company that originally developed the specification,

these products will be offered to customers of both AMD and Fujitsu.

Continuity of Specifications

There is no change to this datasheet as a result of offering the device as a SPANSION

revisions will occur when appropriate, and changes will be noted in a revision summary.

product. Future routine

Continuity of Ordering Part Numbers

AMD and Fujitsu continue to support existing part numbers beginning with "Am" and "MBM". To order these

products, please use only the Ordering Part Numbers listed in this document.

For More Information

Please contact your local AMD or Fujitsu sales office for additional information about SPANSION

solutions.

memory

MBM29F400TC

-55/-70-90

/MBM29F400BC

-55/-70-90

(Continued)

The MBM29F400TC/BC is pin and command set compatible with JEDEC standard. Commands are written to

the command register using standard microprocessor write timings. Register contents serve as input to an

internal state-machine which controls the erase and programming circuitry. Write cycles also internally latch

addresses and data needed for the programming and erase operations. Reading data out of the devices is similar

to reading from12.0 V Flash or EPROM devices.

The MBM29F400TC/BC is programmed by executing the program command sequence. This will invoke the

Embedded Program Algorithm which is an internal algorithm that automatically times the program pulse widths

and verifies proper cell margin. Typically, each sector can be programmed and verified in less than 0.5 seconds.

Erase is accomplished by executing the erase command sequence. This will invoke the Embedded Erase

Algorithm which is an internal algorithm that automatically preprograms the array if it is not already programmed

before executing the erase operation. During erase, the device automatically times the erase pulse widths and

verifies proper cell margin.

A sector is typically erased and verified in 1.0 second (if already completely preprogrammed.).

The devices also features a sector erase architecture. The sector mode allows each sector to be erased and

reprogrammed without affecting other sectors. The MBM29F400TC/BC is erased when shipped from the factory.

The devices features single 5.0 V power supply operation for both read and write functions. Internally generated

and regulated voltages are provided for the program and erase operations. A low V

detector automatically

inhibits write operations on the loss of power. The end of program or erase is detected by Data Polling of DQ

by the Toggle Bit feature on DQ

, or the RY/BY output pin. Once the end of a program or erase cycle has been

completed, the device internally resets to the read mode.

Fujitsu’s Flash technology combines years of EPROM and E

PROM experience to produce the highest levels

of quality, reliability, and cost effectiveness. The MBM29F400TC/BC memory electrically erase the entire chip

or all bits within a sector simultaneously via Fowler-Nordhiem tunneling. The bytes/words are programmed one

byte/word at a time using the EPROM programming mechanism of hot electron injection.

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