EP1810JC-35 datasheet, PDF - EEWORLD Datasheet

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EP1810JC-35: DescriptionUV PLD, 40ns, CQCC68; CategoryProgrammable logic devices Programmable logic; File Size749KB，21 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/

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EP1810JC-35 Overview

UV PLD, 40ns, CQCC68

EP1810JC-35 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Texas Instruments
package instruction	QCCJ, LDCC68,1.0SQ
Reach Compliance Code	not_compliant
Other features	48 MACROCELL; CONFIGURABLE I/O
maximum clock frequency	40 MHz
In-system programmable	NO
JESD-30 code	S-CQCC-J68
JTAG BST	NO
Dedicated input times	12
Number of I/O lines	48
Number of macro cells	48
Number of terminals	68
Maximum operating temperature	70 °C
Minimum operating temperature
organize	12 DEDICATED INPUTS, 48 I/O
Output function	MACROCELL
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	QCCJ
Encapsulate equivalent code	LDCC68,1.0SQ
Package shape	SQUARE
Package form	CHIP CARRIER
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Programmable logic type	UV PLD
propagation delay	40 ns
Certification status	Not Qualified
Maximum supply voltage	5.25 V
Minimum supply voltage	4.75 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED

EP1810JC-35 Related Products

	EP1810JC-35	EP1810LC-35	EP1810LC-45	EP1810LI-45	EP1810JC-45	EP1810JI-45
Description	UV PLD, 40ns, CQCC68	OT PLD, 40ns, PQCC68	OT PLD, 50ns, PQCC68	OT PLD, 50ns, PQCC68	UV PLD, 50ns, CQCC68	UV PLD, 50ns, CQCC68
Is it Rohs certified?	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible
Maker	Texas Instruments	Texas Instruments	Texas Instruments	Texas Instruments	Texas Instruments	Texas Instruments
package instruction	QCCJ, LDCC68,1.0SQ	QCCJ, LDCC68,1.0SQ	QCCJ, LDCC68,1.0SQ	QCCJ, LDCC68,1.0SQ	QCCJ, LDCC68,1.0SQ	QCCJ, LDCC68,1.0SQ
Reach Compliance Code	not_compliant	not_compliant	not_compliant	not_compliant	not_compliant	not_compliant
Other features	48 MACROCELL; CONFIGURABLE I/O	48 MACROCELL; CONFIGURABLE I/O	48 MACROCELL; CONFIGURABLE I/O	48 MACROCELL; CONFIGURABLE I/O	48 MACROCELL; CONFIGURABLE I/O	48 MACROCELL; CONFIGURABLE I/O
maximum clock frequency	40 MHz	40 MHz	33.3 MHz	33.3 MHz	33.3 MHz	33.3 MHz
In-system programmable	NO	NO	NO	NO	NO	NO
JESD-30 code	S-CQCC-J68	S-PQCC-J68	S-PQCC-J68	S-PQCC-J68	S-CQCC-J68	S-CQCC-J68
JTAG BST	NO	NO	NO	NO	NO	NO
Dedicated input times	12	12	12	12	12	12
Number of I/O lines	48	48	48	48	48	48
Number of macro cells	48	48	48	48	48	48
Number of terminals	68	68	68	68	68	68
Maximum operating temperature	70 °C	70 °C	70 °C	85 °C	70 °C	85 °C
organize	12 DEDICATED INPUTS, 48 I/O	12 DEDICATED INPUTS, 48 I/O	12 DEDICATED INPUTS, 48 I/O	12 DEDICATED INPUTS, 48 I/O	12 DEDICATED INPUTS, 48 I/O	12 DEDICATED INPUTS, 48 I/O
Output function	MACROCELL	MACROCELL	MACROCELL	MACROCELL	MACROCELL	MACROCELL
Package body material	CERAMIC, METAL-SEALED COFIRED	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED
encapsulated code	QCCJ	QCCJ	QCCJ	QCCJ	QCCJ	QCCJ
Encapsulate equivalent code	LDCC68,1.0SQ	LDCC68,1.0SQ	LDCC68,1.0SQ	LDCC68,1.0SQ	LDCC68,1.0SQ	LDCC68,1.0SQ
Package shape	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE
Package form	CHIP CARRIER	CHIP CARRIER	CHIP CARRIER	CHIP CARRIER	CHIP CARRIER	CHIP CARRIER
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
power supply	5 V	5 V	5 V	5 V	5 V	5 V
Programmable logic type	UV PLD	OT PLD	OT PLD	OT PLD	UV PLD	UV PLD
propagation delay	40 ns	40 ns	50 ns	50 ns	50 ns	50 ns
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum supply voltage	5.25 V	5.25 V	5.25 V	5.5 V	5.25 V	5.5 V
Minimum supply voltage	4.75 V	4.75 V	4.75 V	4.5 V	4.75 V	4.5 V
Nominal supply voltage	5 V	5 V	5 V	5 V	5 V	5 V
surface mount	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	INDUSTRIAL	COMMERCIAL	INDUSTRIAL
Terminal form	J BEND	J BEND	J BEND	J BEND	J BEND	J BEND
Terminal pitch	1.27 mm	1.27 mm	1.27 mm	1.27 mm	1.27 mm	1.27 mm
Terminal location	QUAD	QUAD	QUAD	QUAD	QUAD	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED

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